Address-stride assisted approximate load value prediction in GPUs
Address-stride assisted approximate load value prediction in GPUs
复制标题
GPU 中的地址跨距辅助近似负载值预测
DOI:
10.1145/3330345.3330362
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发表时间:
2019
期刊:
影响因子:
--
通讯作者:
Jog, Adwait
中科院分区:
文献类型:
--
作者:
Wang, Haonan;Ibrahim, Mohamed;Mittal, Sparsh;Jog, Adwait
Value prediction holds the promise of significantly improving the performance and energy efficiency. However, if the values are predicted incorrectly, significant performance overheads are observed due to execution rollbacks. To address these overheads, value approximation is introduced, which leverages the observation that the rollbacks are not necessary as long as the application-level loss in quality due to value misprediction is acceptable to the user. However, in the context of Graphics Processing Units (GPUs), our evaluations show that the existing approximate value predictors are not optimal in improving the prediction accuracy as they do not consider memory request order, a key characteristic in determining the accuracy of value prediction. As a result, the overall data movement reduction benefits are capped as it is necessary to limit the percentage of predicted values (i.e., prediction coverage) for an acceptable value of application-level error.To this end, we propose a new Address-Stride Assisted Approximate Value Predictor (ASAP) that explicitly considers the memory addresses and their request order information so as to provide high value prediction accuracy. We take advantage of our new observation that the stride between memory request addresses and the stride between their corresponding data values are highly correlated in several applications. Therefore, ASAP predicts the values only for those requests that have regular strides in their addresses. We evaluate ASAP on a diverse set of GPGPU applications. The results show that ASAP can significantly improve the value prediction accuracy over the previously proposed mechanisms at the same coverage, or can achieve higher coverage (leading to higher performance/energy improvements) under a fixed error threshold.
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DOI:
10.1145/2786805.2786807
发表时间:
2015
期刊:
Proceedings of the 2015 10th Joint Meeting on Foundations of Software Engineering
影响因子:
--
作者:
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DOI:
10.1109/hpca.2018.00030
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2018-02
期刊:
2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)
影响因子:
--
作者:
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DOI:
--
发表时间:
1997
期刊:
影响因子:
--
作者:
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通讯作者:
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DOI:
--
发表时间:
2001
期刊:
Proceedings 2001 International Conference on Parallel Architectures and Compilation Techniques
影响因子:
--
作者:
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通讯作者:
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