A Low-Cost Sensor for Aging and Late Transitions Detection in Modern FPGAs
A Low-Cost Sensor for Aging and Late Transitions Detection in Modern FPGAs
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用于现代 FPGA 中老化和后期转换检测的低成本传感器
DOI：
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发表时间：
2011
期刊：
影响因子：
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通讯作者：
M. Tahoori
中科院分区：
文献类型：
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作者：
A. Amouri;M. Tahoori
由于负偏压温度不稳定性（NBTI）和热载流子注入（HCI）引起的晶体管老化是在纳米级下积极缩小器件的主要可靠性问题。最先进的FPGA芯片，使用最新的CMOS技术和最小的特征尺寸，以满足高性能的要求，是在前线面对这个问题。在本文中，我们提出了一个低成本的逻辑电平老化传感器的设计和映射基于FPGA的设计。该传感器的映射设计用于提供受控的灵敏度，范围从警告传感器到后期转换检测器。传感器的功能已在基于Virtex 5的板上得到验证。面积，延迟，和功率开销的一组传感器映射的代表性设计的最老化的关键路径是非常温和的。（~=1.3%面积，~= 1.6%性能，~= 1.5%功率开销）。
Transistor aging due to Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is a major reliability issue for aggressive device downscaling at nanoscale. State-of-the-art FPGA chips, which use most recent CMOS technologies and smallest feature sizes to meet high performance demands, are at the front line to face this problem. In this paper, we present the design and mapping of a low-cost logic level aging sensor for FPGA-based designs. The mapping of this sensor is designed to provide controlled sensitivity, ranging from a warning sensor to late transition detector. The functionality of the sensor has been verified on a Virtex5-based board. Area, delay, and power overhead of a set of sensors mapped for most aging-critical paths of representative designs are very modest. (~=1.3% area, ~= 1.6% performance, and ~= 1.5% power overhead).
FPGA 中的退化分析和缓解
DOI：
10.1109/fpl.2010.88
发表时间：
2010
期刊：
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影响因子：
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作者：
Stott E
通讯作者：
Stott E