Hardware Verification Using Software Analyzers
Hardware Verification Using Software Analyzers
复制标题
使用软件分析仪进行硬件验证
DOI：
10.1109/isvlsi.2015.107
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
T. Melham
中科院分区：
文献类型：
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作者：
Rajdeep Mukherjee;D. Kroening;T. Melham
程序分析是一个非常活跃的研究领域，软件分析器的能力和精度正在迅速提高。我们研究了现代软件验证工具的使用，以在寄存器传输级别对 Verilog 中给出的硬件进行形式属性检查。为此，我们根据综合语义将 RTL Verilog 翻译为等效的字级 ANSI-C 程序。感兴趣的属性作为断言插入到 C 程序中。随后，我们应用了三种不同的软件验证技术——有界模型检查、基于路径的符号模拟和抽象解释——并将它们的性能与传统方法在网表和寄存器传输级别上进行硬件设计属性验证进行比较。我们的实验结果表明，加速超过一个数量级是可能的。据我们所知，这是使用软件验证器在寄存器传输级别对硬件 IP 进行属性验证的首次尝试。
Program analysis is a highly active area of research, and the capacity and precision of software analyzers is improving rapidly. We investigate the use of modern software verification tools for formal property checking of hardware given in Verilog at register-transfer level. To this end, we translate RTL Verilog into an equivalent word-level ANSI-C program, according to synthesis semantics. The property of interest is instrumented into the Cprogram as an assertion. We subsequently apply three different software verification techniques -- bounded model checking, path-based symbolic simulation and abstract interpretation -- and compare their performance to conventional methods for property verification of hardware designs at net list and register transfer level. Our experimental results indicate that speedups of more than an order of magnitude are possible. To the best of our knowledge, this is the first attempt to perform property verification of hardware IPs given at register-transfer level using software verifiers.
抽象冲突驱动学习
DOI：
10.1145/2429069.2429087
发表时间：
2013
期刊：
--
影响因子：
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作者：
D'Silva V
通讯作者：
D'Silva V