A Template-based Framework for Exploring Coarse-Grained Reconfigurable Architectures
A Template-based Framework for Exploring Coarse-Grained Reconfigurable Architectures
复制标题
用于探索粗粒度可重构架构的基于模板的框架
DOI：
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发表时间：
2020
期刊：
影响因子：
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通讯作者：
S. Matsuoka
中科院分区：
文献类型：
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作者：
Artur Podobas;K. Sano;S. Matsuoka
粗粒度可重构架构（CGRA）被认为是现代高性能计算（HPC）系统的补充。这些可重新配置的器件通过提供更高的工作频率、更密集的计算能力和更低的功耗，克服了（更流行的）FPGA的许多限制。如今，CGRA已用于多种嵌入式应用，包括汽车、电信和移动的系统，但有关HPC中CGRA的文献很少，而且该领域充满了研究机会。在这项工作中，我们介绍了我们的CGRA模拟器基础设施，用于评估未来的HPC CGRA系统。我们的CGRA模拟器是建立在可综合的VHDL和高度参数化，包括连接，SIMD，数据类型宽度和异构性的支持。与其他相关工作不同的是，我们的框架支持与第三方内存模拟器的协集成或对未来内存架构的评估，这对于内存绑定应用程序的推理至关重要。我们演示了如何使用我们的框架来探索多个不同内核的性能，显示不同的配置和设计空间选项的影响。
Coarse-Grained Reconfigurable Architectures (CGRAs) are being considered as a complementary addition to modern High-Performance Computing (HPC) systems. These reconfigurable devices overcome many of the limitations of the (more popular) FPGA, by providing higher operating frequency, denser compute capacity, and lower power consumption. Today, CGRAs have been used in several embedded applications, including automobile, telecommunication, and mobile systems, but the literature on CGRAs in HPC is sparse and the field full of research opportunities. In this work, we introduce our CGRA simulator infrastructure for use in evaluating future HPC CGRA systems. Our CGRA simulator is built on synthesizable VHDL and is highly parametrizable, including support for connectivity, SIMD, data-type width, and heterogeneity. Unlike other related work, our framework supports co-integration with third-party memory simulators or evaluation of future memory architecture, which is crucial to reason around memory-bound applications. We demonstrate how our framework can be used to explore the performance of multiple different kernels, showing the impact of different configuration and design-space options.
影响因子：
2.3
作者：
Li, Shang;Yang, Zhiyuan;Jacob, Bruce
通讯作者：
Jacob, Bruce