Efficient Large Integer Multiplication with Arm SVE Instructions

Efficient Large Integer Multiplication with Arm SVE Instructions
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使用 Arm SVE 指令进行高效大整数乘法

DOI:
10.1145/3578178.3578193
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发表时间:
2023
期刊:
Proc. International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2023)
影响因子:
--
通讯作者:
Takuya Edamatsu and Daisuke Takahashi
Takuya Edamatsu and Daisuke Takahashi
中科院分区:
--
文献类型:
--
作者:
R. Tamura;J. Lin;Y. Futamura;T. Sakurai;T. Miyazaki;上ノ山功基,廣田悠輔;廣田悠輔;Takuya Edamatsu and Daisuke Takahashi

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在这项研究中,我们实现了大整数乘法与手臂可扩展向量扩展(SVE)指令。SVE是Arm AArch 64架构的单指令多数据(SIMD)指令集。我们使用减少基数表示技术,因为SIMD指令不保留在大整数乘法计算中部分乘积相加时发生的进位。此外,我们开发并实现了一个乘法算法的基础上的Basecase方法,它允许普通乘法指令的应用程序中的特殊整数的减少基数表示。为了评估性能,我们比较我们的乘法实现在A64 FX处理器与GNU多精度算术库(GMP)。我们表明,与SVE的处理速度比GMP与操作数大于2,048位的乘法。性能增益高达36%。这些结果表明,SVE指令有可能比标量指令更快的大整数乘法,特别是对于大的操作数。
In this study, we implement large integer multiplication with the Arm Scalable Vector Extension (SVE) instructions. SVE is a single instruction, multiple data (SIMD) instruction set for the Arm AArch64 architecture. We use a reduced-radix representation technique because SIMD instructions do not retain the carry that occurs when partial products are added in large integer multiplication computations. Furthermore, we develop and implement a multiplication algorithm based on the Basecase method, which allows the application of ordinary multiplication instructions to special integers in reduced-radix representation. To evaluate performance, we compare our multiplication implementation on an A64FX processor with the GNU Multiple Precision Arithmetic Library (GMP). We show that processing with SVE was faster than GMP for multiplication with operands larger than 2,048 bits. The performance gain was up to 36%. These results suggest that SVE instructions have the potential to be faster than scalar instructions for large integer multiplication, especially for large operands.
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