Achievable-Rate-Aware Retention-Error Correction for Multi-Level-Cell NAND Flash Memory

Achievable-Rate-Aware Retention-Error Correction for Multi-Level-Cell NAND Flash Memory
复制标题

可实现多级单元 NAND 闪存的速率感知保留纠错

DOI:
10.1109/tcad.2021.3123288
复制
发表时间:
2022-10
影响因子:
2.9
通讯作者:
Cheng Jun
Cheng Jun
中科院分区:
计算机科学3区
文献类型:
--
作者:
Bu Yingcheng;Fang Yi;Zhang Guohua;Cheng Jun

文献摘要

参考文献

相似文献

由于多电平单元NAND闪存中数据保持噪声的影响,随着保持时间的增加,初始阈值电压分布和读取电压不再能够用于准确地计算对数似然比(LLR),从而导致保持错误。为了解决这个问题,我们首先利用所谓的“校正因子”来优化LLR精度,通过最大化闪存系统的可实现速率,而不引入额外的存储器感测操作。我们进一步证明了校正因子的优化是一个凸优化问题,可以解析求解。为了获得最佳的校正因子,我们提出了两种保留错误校正方案,称为离线最大可达速率校正(MARC)算法和在线MARC算法,这使得闪存控制器能够利用存储在查找表中的校正LLR,并分别在真实的时间内校正不准确的LLR。根据阈值电压分布的变化特性,提出了一种增强的期望最大化(EM)算法,重新估计相应的参数,进而调整读取电压。通过将增强的EM算法与MARC算法相结合,开发了一种增强的基于EM的校正策略,以进一步提高闪存的保持错误耐受性,同时避免过多的存储器感测开销。理论分析和仿真结果表明,所提出的校正方法的优越性,对保留错误的鲁棒性。
Owing to the effect of data retention noise in multi-level-cell NAND flash memory, the initial threshold-voltage distributions and read voltages can no longer be used to accurately calculate log-likelihood ratios (LLRs) as the retention time increases, thus causing retention errors. To solve this problem, we first utilize the so-called “correction factors” to optimize the LLR accuracy by maximizing the achievable rate of a flash-memory system without introducing extra memory-sensing operations. We further prove that the optimization of the correction factors is a convex optimization problem and can be solved analytically. To obtain the optimal correction factors, we propose two retention-error correction schemes, referred to as offline maximum-achievable-rate correction (MARC) algorithm and online MARC algorithm, which enable the flash-memory controller to utilize the corrected LLRs that are stored in a look-up table and correct the inaccurate LLRs in real time, respectively. Motivated by the variation characteristics of the threshold-voltage distributions, we also propose an enhanced expectation–maximization (EM) algorithm to reestimate their corresponding parameters, and then adjust the read voltages. By combining the enhanced EM algorithm with the MARC algorithms, an enhanced EM-based correction strategy is developed to further boost the retention-error endurance of flash memory while avoiding excessive memory-sensing overhead. Theoretical analyses and simulation results illustrate the superiority of the proposed correction mehtods in terms of the robustness against retention errors.
基于 Protograph-LDPC 的 BICM-ID 多级单元 (MLC) NAND 闪存设计
DOI: 10.1109/lcomm.2019.2915223
发表时间: 2019-05
期刊: IEEE Communications Letters
影响因子: --
作者:
Bu Yingcheng;Fang Yi;Han Guojun;Mumtaz Shahid;Guizani Mohsen
通讯作者: Guizani Mohsen
DOI: 10.1109/tsp.2012.2222399
发表时间: 2013
影响因子: 5.4
作者:
Dong-hwan Lee;Wonyong Sung
通讯作者: Dong-hwan Lee;Wonyong Sung
用于更快收敛混洗置信传播解码的知情固定调度
DOI: 10.1109/lcomm.2016.2617309
发表时间: 2017
期刊: IEEE Communications Letters
影响因子: --
作者:
Aslam Chaudhry Adnan;Guan Yong Liang;Cai Kui;Han Guojun
通讯作者: Han Guojun
DOI: 10.1109/tit.2018.2884210
发表时间: 2019-06
影响因子: 2.5
作者:
Yeow Meng Chee;Johan Chrisnata;Han Mao Kiah;S. Ling;T. T. Nguyen-T.;Van Khu Vu
通讯作者: Yeow Meng Chee;Johan Chrisnata;Han Mao Kiah;S. Ling;T. T. Nguyen-T.;Van Khu Vu
用于 NAND 闪存的分散阵列 LDPC 码和解码器架构
DOI: 10.1109/tcsii.2017.2783438
发表时间: 2018-08
期刊: IEEE Transactions on Circuits and Systems II: Express Briefs
影响因子: --
作者:
Shao Wei;Sha Jin;Zhang Chuan
通讯作者: Zhang Chuan