Design of Protograph-LDPC-Based BICM-ID for Multi-Level-Cell (MLC) NAND Flash Memory

Design of Protograph-LDPC-Based BICM-ID for Multi-Level-Cell (MLC) NAND Flash Memory
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基于 Protograph-LDPC 的 BICM-ID 多级单元 (MLC) NAND 闪存设计

DOI:
10.1109/lcomm.2019.2915223
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发表时间:
2019-05
期刊:
IEEE Communications Letters
影响因子:
--
通讯作者:
Guizani Mohsen
Guizani Mohsen
中科院分区:
其他
文献类型:
--
作者:
Bu Yingcheng;Fang Yi;Han Guojun;Mumtaz Shahid;Guizani Mohsen

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在这篇文章中,研究了在多水平单元(MLC) NAND闪存通道上基于原型低密度奇偶校验(LDPC)的迭代检测和解码(BICM-ID)的位交错编码调制与抗灰度映射的优化。针对现有基于原型码的外部信息传输(PEXIT)算法不适用于BICM-ID MLC闪存通道的问题,提出了一种电压感应PEXIT (VS-PEXIT)算法,以方便原型码的阈值分析。利用提出的VS-PEXIT算法,我们发现AWGN通道上的最优AR4JA码不能保持其与BICM-ID MLC闪存通道相比的优势。为了解决这个问题,我们进一步提出了一种设计方案来构建一个高速率的原型代码,称为优化积累-重复-积累(OARA)代码,专门针对这种情况。理论分析和仿真结果表明,所提出的基于oara的BICM-ID是一种很好的MLC闪存通道存储方案。
In this letter, the optimization of protograph-low-density parity-check (LDPC)-based bit-interleaved coded modulation with iterative detection and decoding (BICM-ID) with anti-Gray mapping is investigated over multi-level-cell (MLC) NAND flash-memory channels. Since the existing protograph-based extrinsic information transfer (PEXIT) algorithm is not applicable to the BICM-ID MLC flash-memory channels, a voltage-sensing PEXIT (VS-PEXIT) algorithm is proposed to facilitate the threshold analysis of protograph codes. Exploiting the proposed VS-PEXIT algorithm, we find that the optimal AR4JA code over AWGN channels cannot preserve its superiority over BICM-ID MLC flash-memory channels. To tackle this problem, we further propose a design scheme to construct a high-rate protograph code, referred to as optimized accumulate-repeat-accumulate (OARA) code, tailored for such scenarios. Theoretical analyses and simulation results illustrate that the proposed OARA-based BICM-ID appears to be an excellent storage scheme over MLC flash-memory channels.
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