Slow and Steady: Measuring and Tuning Multicore Interference

Slow and Steady: Measuring and Tuning Multicore Interference
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缓慢而稳定:测量和调整多核干扰

DOI:
10.1109/rtas48715.2020.000-6
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发表时间:
2020
期刊:
2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)
影响因子:
--
通讯作者:
Alastair F. Donaldson
Alastair F. Donaldson
中科院分区:
--
文献类型:
--
作者:
D. Iorga;Tyler Sorensen;John Wickerson;Alastair F. Donaldson

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现在,无处不在的多核处理器提供了复制的计算核心,允许独立的程序并行运行。但是,共享资源(如末级缓存)可能会导致原本独立的程序相互干扰,从而对它们的执行时间造成重大且不可预测的影响。事实上,先前的工作表明,当两者在多核处理器上并行运行时,巧尽心思构建的敌方程序可能会导致相关软件系统经历数量级的减速。这破坏了这些处理器对具有实时约束的任务的适用性。在这项工作中,我们探索了使用敌方程序对干扰进行经验性测试的技术的设计和评估,着眼于可靠性(干扰结果的重复性)和便携性(干扰测试如何在芯片上有效)。我们首先证明,不同的测量方法在应用于在先前工作中被证明特别有效的敌人过程时,产生显著不同的观测干扰效应的大小和变化。我们提出了一种基于百分位数和可信区间的测量方法,并证明了它提供了竞争性和可重复性的观察结果。我们测量的可靠性使我们能够探索自动调谐,在这种情况下,敌人的程序根据架构进一步专业化。我们在五种不同的多核芯片上评估了三种不同的调优方法(随机搜索、模拟退火法和贝叶斯优化),这些芯片跨越x86和ARM架构。为了表明我们调优的敌方程序适用于应用程序,我们评估了我们在AutoBtch和CoreMark基准测试套件上的方法导致的速度减慢。与以前的工作相比,我们的方法在105个基准芯片组合中的35个中实现了统计上更大的减速,最大差异为3.8美元\x$。我们设想,在调查哪些多核处理器适合实时任务时,像我们这样的经验性方法将对“第一次通过”评估很有价值。
Now ubiquitous, multicore processors provide replicated compute cores that allow independent programs to run in parallel. However, shared resources, such as last-level caches, can cause otherwise-independent programs to interfere with one another, leading to significant and unpredictable effects on their execution time. Indeed, prior work has shown that specially crafted enemy programs can cause software systems of interest to experience orders-of-magnitude slowdowns when both are run in parallel on a multicore processor. This undermines the suitability of these processors for tasks that have real-time constraints. In this work, we explore the design and evaluation of techniques for empirically testing interference using enemy programs, with an eye towards reliability (how reproducible the interference results are) and portability (how interference testing can be effective across chips). We first show that different methods of measurement yield significantly different magnitudes of, and variation in, observed interference effects when applied to an enemy process that was shown to be particularly effective in prior work. We propose a method of measurement based on percentiles and confidence intervals, and show that it provides both competitive and reproducible observations. The reliability of our measurements allows us to explore auto-tuning, where enemy programs are further specialised per architecture. We evaluate three different tuning approaches (random search, simulated annealing, and Bayesian optimisation) on five different multicore chips, spanning x86 and ARM architectures. To show that our tuned enemy programs generalise to applications, we evaluate the slowdowns caused by our approach on the AutoBench and CoreMark benchmark suites. Our method achieves a statistically larger slowdown compared to prior work in 35 out of 105 benchmarldchip combinations, with a maximum difference of $ 3.8\times$. We envision that empirical approaches, such as ours, will be valuable for ‘first pass’ evaluations when investigating which multicore processors are suitable for real-time tasks.
多核共享缓存的拒绝服务攻击:分析与预防
DOI: 10.1109/rtas.2019.00037
发表时间: 2019
期刊: 2019 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS
影响因子: --
作者:
Bechtel, Michael;Yun, Heechul
通讯作者: Yun, Heechul