SAT-based reverse engineering of gate-level schematics using fault injection and probing
SAT-based reverse engineering of gate-level schematics using fault injection and probing
复制标题
使用故障注入和探测的基于 SAT 的门级原理图逆向工程
DOI:
10.1109/hst.2018.8383918
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发表时间:
2018
期刊:
影响因子:
--
通讯作者:
Daniel E. Holcomb
中科院分区:
文献类型:
--
作者:
S. Keshavarz;Falk Schellenberg;Bastian Richter;C. Paar;Daniel E. Holcomb
Gate camouflaging is a known security enhancement technique that tries to thwart reverse engineering by hiding the functions of gates or the connections between them. A number of works on SAT-based attacks have shown that it is often possible to reverse engineer a circuit function by combining a camouflaged circuit model and the ability to have oracle access to the obfuscated combinational circuit. Especially in small circuits it is easy to reverse engineer the circuit function in this way, but SAT-based reverse engineering techniques provide no guarantees of recovering a circuit that is gate-by-gate equivalent to the original design. In this work we show that an attacker who doesn't know gate functions or connections of an aggressively camouflaged circuit cannot learn the correct gate-level schematic even if able to control inputs and probe all combinational nodes of the circuit. We then present a stronger attack that extends SAT-based reverse engineering with fault analysis to allow an attacker to recover the correct gate-level schematic. We analyze our reverse engineering approach on an S-Box circuit.
影响因子:
2
作者:
Wang, Huanyu;Forte, Domenic;Tehranipoor, Mark M.;Shi, Qihang
通讯作者:
Shi, Qihang