A Methodology for Simulating Multi-chiplet Systems Using Open-source Simulators
A Methodology for Simulating Multi-chiplet Systems Using Open-source Simulators
复制标题
使用开源模拟器模拟多小芯片系统的方法
DOI：
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复制
发表时间：
2021
期刊：
影响因子：
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通讯作者：
Letian Huang
中科院分区：
文献类型：
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作者：
Haocong Zhi;Xianuo Xu;Weijian Han;Zhilin Gao;Xiaohang Wang;M. Palesi;A. Singh;Letian Huang
多芯片系统是一种新的设计模式，以降低芯片设计成本，提高成品率的复杂系统芯片。与单芯片SoC系统相比，多小芯片系统的设计空间大得多。为了支持早期设计空间探索，模拟器是至关重要的。然而，现有的开源多核/众核仿真器由于以下原因而不适合于仿真大规模多小芯片系统：1）缺乏精确的小芯片间互连模型，以及2）不能支持具有精确互连建模的大规模并行仿真。因此，我们提出了一种方法，用于建立一个多芯片系统的模拟器，使用开源的模拟器，如gem 5，狙击手，gpgpu-sim等。这种模拟方法模仿的重用和集成的想法的小芯片，也就是说，这些现有的开源模拟器被重用来模拟单个小芯片，和一个模拟器进程间的通信和同步协议，提出了模拟小芯片间的通信。所提出的仿真方法具有以下特点：1）支持大规模系统的并行仿真，精确建模小芯片间和小芯片内的互连。2)分布式和共享存储器模型都支持多小芯片系统。我们还提供了一种方法来修改开源模拟器的代码，如gem 5，sniper，gpgpu-sim等，用于多芯片模拟，我们已经在https://github.com/FCAS-SCUT/chiplet_simulators上发布了基于gem 5，sniper，gpgpu-sim的多芯片模拟器的源代码。在未来，我们将移植更多的应用程序/基准测试，并集成更多的开源模拟器。
Multi-chiplet systems are a new design paradigm to mitigate the chip design cost and improve yield for complex SoCs. The design space of multi-chiplet systems is much larger compared to a single chip SoC system. To support early stage design space exploration, simulators are of paramount importance. However, existing open-source multi-/many-core simulators are not suitable for simulating large-scale multi-chiplet systems due to the following reasons: 1) lack of accurate inter-chiplet interconnection model, and 2) incapable of supporting large-scale parallel simulation with accurate interconnection modelling. Therefore, we propose a methodology for building up a simulator for multi-chiplet systems using open-source simulators like gem5, sniper, gpgpu-sim, etc. This simulation methodology mimics the reuse and integration idea of chiplets, that is, these existing open-source simulators are reused to simulate individual chiplets, and an inter-simulator-process communication and synchronization protocol is proposed to simulate inter-chiplet communication. The proposed simulation methodology has the following features: 1) Parallel simulation for large-scale systems is supported with inter- and intra-chiplet interconnection accurately modelled. 2) Both distributed and shared memory models are supported for multi-chiplet systems. We also provide a method to modify the code of the open-source simulators like gem5, sniper, gpgpu-sim, etc. for multi-chiplet simulation, and we have released the source code of multi-chiplet simulators based on gem5, sniper, gpgpu-sim at https://github.com/FCAS-SCUT/chiplet_simulators. In the future we will port more applications/benchmarks and integrate more open-source simulators.
使用标准 ASIC CAD 工具进行 2.5D 系统的小芯片封装协同设计
DOI：
10.1109/asp-dac47756.2020.9045734
发表时间：
2020
期刊：
2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC
影响因子：
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作者：
Kabir, MD Arafat;Peng, Yarui
通讯作者：
Peng, Yarui