A Wideband Linear I/Q-Interleaving DDRM

A Wideband Linear I/Q-Interleaving DDRM
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宽带线性 I/Q 交错 DDRM

DOI:
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发表时间:
2018
期刊:
IEEE J. Solid State Circuits
影响因子:
--
通讯作者:
M. Alavi
M. Alavi
中科院分区:
--
文献类型:
--
作者:
M. Mehrpoo;M. Hashemi;Yiyu Shen;L. D. Vreede;M. Alavi

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提出了一种基于40 nm CMOS工艺的宽带线性直接数字射频调制器(DDRM)。提出了一种创新的I/Q交织RF数模转换器(DAC),以使同相(I$)和正交(Q$)信号以更加数字化的方式组合,从而提高大带宽下的线性度性能。DDRM还具有先进的二阶保持数字插值滤波器,可在存在大带宽信号的情况下抑制采样频谱副本。此外,在RF DAC操作的背景下,谐波抑制技术被采用和实现。2美元的 16 × 9$ -bit DDRM核的面积为0.21 mm ~ 2,在1和3 GHz时的功耗分别为110和146 mW,峰值功率为+9.2 dBm。对于57 MHz 64-QAM信号,3 GHz时的误差矢量幅度(EVM)和邻道功率比(ACPR)分别优于−30和−45 dB,ACPR在高达113 MHz的宽带宽下保持低至−44 dBc。
This paper presents a wideband linear direct-digital RF modulator (DDRM) in 40-nm CMOS technology. An innovative $I/Q$ -interleaving RF digital-to-analog converter (DAC) is proposed to enable the combination of in-phase ( $I$ ) and quadrature ( $Q$ ) signals in a more digital fashion, thereby improving the linearity performance at large bandwidths. The DDRM also features an advanced second-order hold digital interpolation filter to suppress the sampling spectral replicas in the presence of large bandwidth signals. Moreover, the harmonic rejection technique in the context of RF DAC operation is adopted and implemented. The $2 imes 9$ -bit DDRM core occupies 0.21 mm2 and consumes 110 and 146 mW at 1 and 3 GHz, respectively, with the peak power of +9.2 dBm. The error vector magnitude (EVM) and adjacent channel power ratio (ACPR) at 3 GHz for a 57-MHz 64-QAM signal are better than −30 and −45 dB, respectively, and ACPR remains as low as −44 dBc up to a wide bandwidth of 113 MHz.
DOI: 10.1109/jssc.2015.2496956
发表时间: 2016-01
影响因子: 5.4
作者:
Wen Yuan;V. Aparin;J. Dunworth;L. Seward;J. Walling
通讯作者: Wen Yuan;V. Aparin;J. Dunworth;L. Seward;J. Walling