Support for Parallel Design in an Engineering Information System

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As the design of a complex object, such as a VLSI circuit, evolves, many subcomponents are designed in parallel. Conflicts can arise when subcomponents fail to meet the specifications that are assumed at a higher level, and conflicts can also arise when two different representations of the same object, such as the circuit and logic representations, become inequivalent due to changes in one representation that are not reflected in the other. This research project will investigate techniques for automatically detecting the presence of conflicts through the information stored in an engineering information system and will explore tools and methods for resolving detected conflicts. The process of conflict recognition will be characterized by the use of complete and formally correct methods to identify and classify all potential conflicts. Conflict resolution will rely on artificial intelligence techniques involving the use of encoded heuristic rules of thumb and human intervention as necessary. The goal of this research is to construct a skeletal set of formal results on conflict detection, enumeration, classification, and minimization, tailored to the VLSI design process but applicable to other design domains.