Efficient Execution of Dataflow Programs

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A number of architectures have been proposed to implement the basic principles of dataflow computation. The main problem common to all these architectures is a large overhead associated with the execution of each individual instruction. In particular, each operand that passes from one instruction to another may have to travel considerable distances through a communication network and various hardware components (special memories and queues) before it reaches its destination. Furthermore, operands destined for the same instruction must be recognized and segregated in a special token matching store. Only when all operands have arrived for an instruction, can it be scheduled for execution on a processor. In comparison, passing an operand from one instruction to another in a von Neumann computer requires only a simple memory store operation. In this research, a different approach is used to executing dataflow program, which significantly reduces the overhead of operand routing and matching. The approach is based on the idea of breaking a given dataflow program into segments of code which, due to their operand dependencies, must be executed sequentially. Each such sequence may be loaded into memory for execution whenever its first instruction is enabled. Once loaded,it can be viewed as a very simple sequential process, which is ready when its current instruction is enabled, running when there is a free processor, and blocked when its current instruction is waiting for operands to arrive. Hence, the dataflow program may be viewed as a collection of very simple communicating processes. In this research, they will investigate the process-oriented approach by formulating the model and the architecture in more detail and by performing extensive simulation experiments to compare its performance to von Neumann computers and to other dataflow systems.