Implementation of Maximum Likelihood Decoding for Trellis Codes and Trellis Coded Modulation

网格码最大似然译码及网格编码调制的实现

• 批准号: 8801254
• 负责人: Andrew Viterbi
• 金额: $ 22.59万
• 依托单位: Qualcomm Incorporated
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1988
• 资助国家: 美国
• 起止时间: 1988-05-01 至 1989-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8801254&HistoricalAwards=false
• 关键词: Implementation; Maximum; Likelihood; Decoding; Trellis

A single chip implementation of a maximum likelihood Viterbi decoder is being studied for use with convolutional codes and trellis coded modulation. The actual final design and fabrication will occur in Phase III. The decoder is matched to all codes with up to 64 states with the property that branches connect any state in the trellis to at most 4 new states. This decoder chip will have extensive applications in digital communication systems and in digital recording systems including magnetic, magneto-optic and optical systems. This chip is expected to be of use in high-speed telephone-line modems, satellite communication, and magnetic recording applications. The maximum-likelihood decoder will significantly reduce the incidence of channel induced errors in the information bit stream, which was previously convolutionally encoded. While the convolutional encoder is easy to implement, the dynamic programming algorithm which constitutes the Viterbi decoder is much more difficult and is thus a very significant contribution.

最大似然维特比解码器的单芯片实现是 正在研究用于卷积码和网格编码 调变 实际的最终设计和制造将在 第三阶段。 解码器匹配所有代码，最多64个状态 具有分支将网格中的任何状态连接到at 4个新国家。 该解码芯片具有广泛的应用前景 在数字通信系统和数字记录系统中 包括磁、磁光和光学系统。 该芯片有望用于高速电话线调制解调器， 卫星通信和磁记录应用。 的 最大似然解码器将显著降低 通道在信息比特流中引起错误，这是 以前的卷积编码。 虽然卷积编码器是 易于实现，其中构成的动态规划算法 维特比解码器要困难得多 重大贡献。