System Synthesis From Specification Charts

根据规格图表进行系统综合

• 批准号: 8922851
• 负责人: Daniel Gajski
• 金额: $ 25.19万
• 依托单位: University of California-Irvine
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1990
• 资助国家: 美国
• 起止时间: 1990-06-01 至 1995-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8922851&HistoricalAwards=false
• 关键词: System; Synthesis; Specification; Charts

Gajski Research is on system synthesis where specifications are expressed in terms of a graphical language called "specification charts". It has sufficient expressive power to describe IC systems in terms of activities initiated and terminated by events. Topics are: 1. definition of the specification charts language; 2. determining how to translate the language into VHDL; 3. algorithms for partitioning the specifications into system components (e.g. chips) and for quality estimations using system quality measures; 4. incorporation of interface synthesis into system synthesis; and 5. evaluation of the tools being developed.

加伊斯基 研究是在系统综合的规格表示的图形语言称为“规格图”。 它有足够的表达能力来描述IC系统的活动发起和终止的事件。 主题是：1. 规格说明书图表语言的定义; 2. 确定如何将语言翻译成VHDL; 3. 用于将规范划分成系统组件（例如，芯片）和用于使用系统质量测量的质量估计的算法; 4. 将界面综合纳入系统综合; 5. 评估正在开发的工具。