RIA: Synthesis and Implementation of Multi-Rate Arrays

对高速实时信号和图像处理的需求不断增长，导致了许多新的并行架构。在这些收缩阵列中，一类重要的并行架构在这些应用的算法的VLSI实现中发挥了重要作用。由于收缩阵列是特定于算法的，因此有必要开发将算法合成和自动映射到这些阵列上的方法。其他研究人员的工作已经解决了基于一致递归方程（URE）或等效算法规范的综合问题。局部通信是有效实现收缩阵列的关键因素。然而，与全局通信相比，它需要额外的延迟，从而减少了计算时间。特别是，对于PE具有简单结构的许多细粒度操作，数据传输的额外延迟变得受限。此外，许多算法不能直接转换为UREs或可能不表现出局部性。局部性限制可以通过多速率阵列（MRA）来解决。这些阵列以多速率方式传输数据，可用于许多DSP和矩阵计算，从而使速度超过收缩阵列。在这个项目中，我们将以前的收缩阵列设计方法扩展到mra的几个方向。首先，我们进一步发展了我们在mra合成方面的最新成果，并获得了mra设计自动化的正式程序。其次，我们研究了MRAs在DSP和图像处理算法中的应用。这包括在加速、效率、架构复杂性、数据路径数量和VLSI芯片面积方面，对mra与本地广播（收缩）、有界广播和全局广播阵列进行全面比较。

The growing demand for high speed real-time signal and image processing has led to many new parallel architectures. Among these systolic arrays is an important class of parallel architectures that has played a significant role in the VLSI implementation of algorithms of these applications. Since systolic arrays are algorithmic specific, it is essential to develop methods for the synthesis and automatic mapping of algorithms onto these arrays. Work by other researchers has addressed the synthesis problem based on uniform recurrence equations (URE) or equivalent specifications of algorithms. Local communication is an essential factor for effective realization of systolic arrays. However, compared to global communication it requires extra delays which reduce the computation time. Particularly, for many fine-grain operations where the PE has a simple structure the additional delay for the transmission of data becomes restrictive. Furthermore, many algorithms can not be directly transformed to UREs or may not exhibit the property of locality. The locality restriction can be solved by using Multi-Rate Arrays (MRA). These arrays transmit the data in a multi-rate fashion and can be used for many DSP and matrix computations resulting in speed up over systolic arrays. In this project we extend previous design methods for systolic arrays to MRAs in several directions. First, we further develop our recent results on the synthesis of MRAs and obtain a formal procedure for the design automation of MRAs. Secondly, we investigate the application of MRAs to DSP and image processing algorithms. This includes a thorough comparison of MRAs with local broadcast (systolic,) bounded-broadcast, and global broadcast arrays in terms of speedup, efficiency, architecture complexity, number of data paths, and VLSI chip area.