RIA: Synthesis and Implementation of Multi-Rate Arrays

对高速实时信号和图像处理的日益增长的需求导致了许多新的并行体系结构。在这些脉动阵列中，有一类重要的并行结构，它在这些应用的算法的VLSI实现中发挥了重要作用。由于脉动阵列是特定于算法的，因此开发算法合成和自动映射到这些阵列上的方法是必不可少的。其他研究人员的工作已经解决了基于统一递归方程(URE)或等价算法规范的综合问题。局部通信是有效实现脉动阵列的重要因素。然而，与全局通信相比，它需要额外的延迟，从而减少计算时间。特别是，对于PE具有简单结构的许多细粒度操作，数据传输的附加延迟变得受限。此外，许多算法不能直接转化为特征，或者可能不具有局部性。使用多速率阵列(MRA)可以解决局部性限制。这些阵列以多速率方式传输数据，并可用于许多DSP和矩阵计算，从而提高了脉动阵列的速度。在这个项目中，我们将以前的脉动阵列设计方法在几个方向上扩展到MRA。首先，我们进一步发展了我们在MRAs综合方面的最新结果，得到了MRAs设计自动化的形式化过程。其次，研究了MRAS在数字信号处理器和图像处理算法中的应用。这包括在加速比、效率、体系结构复杂性、数据路径数量和VLSI芯片面积方面对MRA与本地广播(脉动)、有界广播和全局广播阵列进行全面比较。

The growing demand for high speed real-time signal and image processing has led to many new parallel architectures. Among these systolic arrays is an important class of parallel architectures that has played a significant role in the VLSI implementation of algorithms of these applications. Since systolic arrays are algorithmic specific, it is essential to develop methods for the synthesis and automatic mapping of algorithms onto these arrays. Work by other researchers has addressed the synthesis problem based on uniform recurrence equations (URE) or equivalent specifications of algorithms. Local communication is an essential factor for effective realization of systolic arrays. However, compared to global communication it requires extra delays which reduce the computation time. Particularly, for many fine-grain operations where the PE has a simple structure the additional delay for the transmission of data becomes restrictive. Furthermore, many algorithms can not be directly transformed to UREs or may not exhibit the property of locality. The locality restriction can be solved by using Multi-Rate Arrays (MRA). These arrays transmit the data in a multi-rate fashion and can be used for many DSP and matrix computations resulting in speed up over systolic arrays. In this project we extend previous design methods for systolic arrays to MRAs in several directions. First, we further develop our recent results on the synthesis of MRAs and obtain a formal procedure for the design automation of MRAs. Secondly, we investigate the application of MRAs to DSP and image processing algorithms. This includes a thorough comparison of MRAs with local broadcast (systolic,) bounded-broadcast, and global broadcast arrays in terms of speedup, efficiency, architecture complexity, number of data paths, and VLSI chip area.