Fault Modeling and Test Generation for Mixed-Signal Integrated Circuits

点击翻译按钮获取中文摘要

The proposed research is on fault modeling and test generation for mixed signal integrated circuits. In the area of fault models, defect and yield statistics are being used to derive comprehensive fault models for analog circuits. These include functional fault models useable in design for test and test generation. New test generation algorithms are being derived for analog circuits, and techniques are being developed to interface the analog tests with the digital circuitry in a mixed signal circuit. The fundamental theories are being validated experimentally with designs and data from industry.