CISE Research Instrumentation

CISE 研究仪器

• 批准号: 9320325
• 负责人: C Krishna
• 金额: $ 4万
• 依托单位: University of Massachusetts Amherst
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1994
• 资助国家: 美国
• 起止时间: 1994-03-01 至 1995-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9320325&HistoricalAwards=false
• 关键词: CISE; Research; Instrumentation

9320325 Krishna The equipment funded by this award will be used for several research projects, including in particular the following: (1) VLSI Arithmetic Arrays for Digital Signal Processing: Methodologies and tools for analyzing and comparing design alternatives at various levels of abstraction are being developed. Part of the work consists of implementing chip designs using the fabrication facilities of the Massachusetts Microelectronics Center and MOSIS. (2) High-Performance VLSI Synthesis with Wave Pipelining: Wave pipelining is a custom circuit design method which has previously been used in hand-crafted designs. This technique is being incorporated in CAD tools for the automatic synthesis of high-performance VLSI circuits. (3) Testable Non-Scan Sequential Circuits: Design and development methodology for sequential circuits are being done so that most path delay faults can be detected. To avoid performance degradation, any circuitry added to enhance testability is not allowed to be in functional paths. (4) Reconfiguration of Real-Time Distributed Systems: Reconfiguration is a powerful method to improve the performance of distributed systems. Currently, it has largely been used only to react to component failures. In this project, techniques are being developed to configure the system as a function of the prevailing workload so that the performance is optimized. (5) Topological and Physical Layout Design Techniques for Yield Enhancement: The greater integration levels and die sizes in integrated circuits have increased the need for yield enhancement. In this project, design techniq ues are being developed to improve the yield of larger chips, so as to fully benefit from the advantages of higher levels of integration. *** ( kT 3COM t WINA20 386 ` $ AUTOEXEC33 Xt V LM VW @$ CONFIG BAK V CONFIG OLD nW WIN31 X 9320325 Krishna The equipment funded by this award will be used for several research projects, including in particular the Z \ u w { $ $ $ $ G Times Symbol " Helvetica Chicago Times New Roman & Arial 5 Courier New R ZapfDingbats Palatino Greek GenMath MathMeteor MT Extra " f eDj 6 Krishna/UMass Mark Purvis Mark Purvis

小行星9320325 该奖项资助的设备将用于几个研究项目，特别是以下项目： (1)数字信号处理的VLSI算术阵列：正在开发用于分析和比较各种抽象层次的设计方案的方法和工具。 部分工作包括使用马萨诸塞州微电子中心和MOSIS的制造设施实现芯片设计。 (2)使用Wave流水线的高性能VLSI综合：Wave流水线是一种定制电路设计方法，以前曾用于手工设计。 这种技术被纳入CAD工具的自动合成高性能的VLSI电路。 (3)可测试的非扫描时序电路：时序电路的设计和开发方法正在进行，以便可以检测到大多数路径延迟故障。 为了避免性能下降，任何为增强可测试性而添加的电路都不允许位于功能路径中。 (4)实时分布式系统的重构：重构是提高分布式系统性能的一种有效方法。 目前，它主要用于对组件故障做出反应。 在这个项目中，正在开发技术，根据当前的工作量配置系统，以便优化性能。 (5)提高成品率的拓扑和物理布局设计技术：集成电路中更大的集成度和管芯尺寸增加了对成品率提高的需求。 在该项目中，正在开发设计技术，以提高较大芯片的产量，从而充分受益于更高集成度的优势。 *** ( KT 3COM 不 WINA20 386 ` $AUTOEXEC33 XT V LM 大众汽车@$ 配置巴克 V 旧配置 NW WIN31 X 小行星9320325 该奖项资助的设备将用于几个研究项目，特别是包括 Z \ u W { $ $ $ $ G 倍 Helvetica符号 芝加哥 Times New Roman Arial 5罗马新R ZapfDingbats Palatino 希腊 GenMath 数学气象 MT Extra " f eDj 6 Krishna/马萨诸塞大学 马克·珀维斯