Atomic-Scale Mechanism of Metal Etching Reactions Determined by High-Speed Variable-Temperature Scanning Tunneling Microscopy

通过高速变温扫描隧道显微镜确定金属蚀刻反应的原子尺度机制

• 批准号: 9414404
• 负责人: Eric Altman
• 金额: $ 24万
• 依托单位: Yale University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1994
• 资助国家: 美国
• 起止时间: 1994-08-01 至 1998-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9414404&HistoricalAwards=false
• 关键词: Atomic; Scale; Mechanism; Metal; Etching

94114404 Altman The mechanism of metal etching reactions will be studied using high speed variable temperature STM along with macroscopic surface analysis techniques. The project will focus on halogen etching of copper because of interest in using copper as an interconnect material in integrated circuits. The study will concentrate on the two major reaction steps in halogen etching of copper: 1)copper halide formation and 2)halide removal by sublimation and/or reaction. The factors that limit etching rates will be directly determined through STM "movies" monitoring the surface under etching conditions. A mechanistic kinetic model based on the elementary reaction steps observed with STM will be developed. The results will guide development of new etching processes and new etching schemes to directly pattern fine metal lines. %%% This research is anticipated to provide an atomic-level understanding of etching reactions that are an important step in integrated circuit fabrication. This understanding will aid development of new etching processes to allow new materials to be used in integrated circuits. The use of new materials will be required to continue the trend of increased device speed and decreased device size into the next century. The results of this research will have an impact on the fabrication and general perform ance of advanced devices and integrated circuits used in computing, information processing, and tele communica tions. ***

94114404 Altman将使用高速变温STM沿着宏观表面分析技术研究金属蚀刻反应的机理。 该项目将专注于铜的卤素蚀刻，因为有兴趣在集成电路中使用铜作为互连材料。 本研究将集中于铜的卤素蚀刻中的两个主要反应步骤：1）卤化铜的形成和2）通过升华和/或反应去除卤化物。 限制蚀刻速率的因素将通过在蚀刻条件下监测表面的STM“电影”直接确定。 一个机械动力学模型的基础上观察到的STM的基元反应步骤将被开发。 研究结果将指导开发新的蚀刻工艺和新的蚀刻方案，以直接图案化精细金属线。这项研究预计将提供对蚀刻反应的原子级理解，这是集成电路制造中的重要步骤。 这种理解将有助于开发新的蚀刻工艺，使新材料用于集成电路。 在下一个世纪，将需要使用新材料来继续提高器件速度和减小器件尺寸的趋势。 这项研究的结果将对用于计算、信息处理和电信的先进器件和集成电路的制造和一般性能产生影响。 ***