Atomic-Scale Mechanism of Metal Etching Reactions Determined by High-Speed Variable-Temperature Scanning Tunneling Microscopy

94114404阿尔特曼将利用高速变温扫描隧道显微镜和宏观表面分析技术研究金属蚀刻反应的机理。该项目将专注于铜的卤素蚀刻，因为人们对将铜用作集成电路中的互连材料感兴趣。这项研究将集中在铜的卤素腐蚀过程中的两个主要反应步骤：1)卤化铜的形成和2)升华和/或反应去除卤化物。限制蚀刻速率的因素将通过在蚀刻条件下监测表面的STM“电影”来直接确定。将建立一个基于STM观察到的基本反应步骤的机理动力学模型。这一结果将指导新的刻蚀工艺和新的刻蚀方案的开发，以直接绘制精细的金属线。这项研究有望对集成电路制造中的重要步骤--刻蚀反应提供原子水平的理解。这一理解将有助于开发新的刻蚀工艺，使新材料能够用于集成电路。新材料的使用将需要将器件速度提高和器件尺寸减小的趋势延续到下个世纪。这项研究的结果将对用于计算、信息处理和远程通信的先进器件和集成电路的制造和总体性能产生影响。***

94114404 Altman The mechanism of metal etching reactions will be studied using high speed variable temperature STM along with macroscopic surface analysis techniques. The project will focus on halogen etching of copper because of interest in using copper as an interconnect material in integrated circuits. The study will concentrate on the two major reaction steps in halogen etching of copper: 1)copper halide formation and 2)halide removal by sublimation and/or reaction. The factors that limit etching rates will be directly determined through STM "movies" monitoring the surface under etching conditions. A mechanistic kinetic model based on the elementary reaction steps observed with STM will be developed. The results will guide development of new etching processes and new etching schemes to directly pattern fine metal lines. %%% This research is anticipated to provide an atomic-level understanding of etching reactions that are an important step in integrated circuit fabrication. This understanding will aid development of new etching processes to allow new materials to be used in integrated circuits. The use of new materials will be required to continue the trend of increased device speed and decreased device size into the next century. The results of this research will have an impact on the fabrication and general perform ance of advanced devices and integrated circuits used in computing, information processing, and tele communica tions. ***