Bit/Byte Bounded Error Control Codes for Byte-Organized Systems

该项目的主要目标是使用一种新的差错控制模型为“字节组织的”系统设计差错控制码。在按字节组织的系统中，硬件被分区，使得每个部分在输出中产生命中的子集。例如，可以将存储器组织为每个卡一个字节。在这种情况下，每个卡在存储字中产生一个字节。对于这样的系统，正在开发一种新的差错控制模型，称为比特/字节界限模型。简而言之，该模型可以使用两个参数来描述，例如t和u。使用比特/字节有界模型设计的代码可以容忍限制在必须u字节内的高达t个比特差错。与现有的方法不同，比特/字节界限模型可以在传统的比特和1字节误差模型之间进行内插。此外，该模型还可以通过牺牲少量的差错控制能力来减少校验位的数量。

The principal goal of this project is to design error control codes for "byte-organized" systems using a new error control model. In a byte-organized system, the hardware is partitioned such that each part produced a subset of hits in the output. For example, a memory may be organized as one byte per card. In this case, each card produces a byte in the memory word. For such systems, a new error control model called the bit/byte bounded model is being developed. Briefly, this model can be described using tow parameters, say t and u. The codes designed using the bit/byte bounded model can tolerate up to t bit errors confined to a must u bytes. Unlike the existing approaches, the bit/byte bounded model can interpolate between the traditional bit and 1 byte error models. Also, the proposed model can be used to reduce the number of checkbits by trading a small amount of error control capability.