NSF/DARPA DDFRP: Distributed Design and Manufacturing Using Solid Freeform Fabrication: Computational and Design Tools

本提案的总体目标是开发底层计算和设计工具，以利用当前分布式计算资源和新兴快速原型技术的融合。物理原型的最新进展允许直接从计算机模型生产自由形状的实体对象，而不需要特定零件的工具或人工干预。这些技术被称为固体自由曲面制造（SFF）。该技术的优点包括大大减少了制造时间和成本，并且能够在一次操作中实现需要多次操作或在某些情况下无法使用标准技术制造的形状。此外，高性能计算网络的进步使与工程部件和系统的分析和设计有关的信息能够迅速传播。研究人员和工业制造商已经注意到机械元件制造中基于层的SFF技术的潜力与微电子元件制造中的VLSI之间的相似之处。为了使SFF获得与VLSI相媲美的可行制造方法的地位，必须解决几个技术缺点。首先，必须开发一种适当的方法来传输设计数据，因为当前的标准是不准确、不完整和不可扩展的。其次，用于评估设计可制造性的设计/制造知识必须编码，以供设计师和SFF制造商使用。该研究项目将开发和展示集成SFF和分布式计算的进步所需的技术基础；具体来说：(1)开发和研究一种新的几何数据交换标准，该标准包含三维零件几何形状、空间材料变化和制造指令（例如公差）；(2)开发可用于传输由三维数据生成的制造信息的二维界面；(3)对SLS过程的设计规则检查进行编码和论证；(4)用行业合作伙伴的设计实例对交换标准和设计规则进行检验。工作的重点将是选择性激光烧结工艺，特别是任务2和3。然而，这项工作将着眼于所有基于层的SFF过程的通用性，并与其他研究小组的工作相结合。固体自由曲面制造（SFF）技术在许多经济领域提供了显著缩短产品实现周期的潜力，从机电和消费产品到汽车和航空航天工业。SFF目前主要应用于原型制造和有限生产，但许多研究人员和商业开发人员正致力于将这些技术发展成为有效和可行的制造技术。本研究的重点是实现这一目标的两个关键：(1)开发合适的、健壮的数据交换标准来表示制造信息；(2)规范针对SFF制造技术的“为制造而设计”规则。微电子工业在其早期面临着类似的挑战，许多研究人员和实践者已经注意到集成电路制造和SFF制造的相似之处。这项研究的完成将为SFF实现类似微电子工业的成功所需的计算方面提供基础。

The overall objective of this proposal is to develop the underlying computational and design tools to take advantage of the confluence of current distributed computational resources and emerging rapid prototyping technologies. Recent advances in physical prototyping allow the production of freeform solid objects directly from a computer model without part-specific tooling or human intervention. These technologies have been termed Solid Freeform Fabrication (SFF). Benefits of this technology include greatly reduced fabrication time and cost, and the capability to achieve, in one operation, shapes that would otherwise require multiple operations or in some cases would be impossible to manufacture with standard techniques. In addition, advances in high performance computational networks enable rapid dissemination of information related to the analysis and design of engineering components and systems. Researchers and industrial manufacturers have noted similarities between the potential for layer-based SFF technologies in mechanical component manufacture and VLSI for microelectronic component manufacture. For SFF to gain status as a viable manufacturing approach comparable to VLSI, several technological shortcomings must be addressed. First, an appropriate method for transmitting design data must be developed, as current standards are inaccurate, incomplete, and unextendable. Second, design/fabrication knowledge for assessing manufacturability of designs must be encoded for use by both designers and SFF fabricators. This research project will develop and demonstrate the technology base needed to integrate advances in both SFF and distributed computation; specifically to: (1) develop and investigate a new data exchange standard for geometric data that incorporates three-dimensional part geometry, spatial material variations, and fabrication directives (e.g., tolerances); (2) develop a two-dimensional interface that can be used to transmit fabrication information generated from the 3D data; (3) encode and demonstrate design rules checking for the SLS process; and (4) test the exchange standards and design rules with design examples from industrial partners. The focus of work will be the selective laser sintering process, particularly for tasks 2 and 3. However, the work will be performed with an eye for generality for all layer-based SFF processes and for integration with the work of other research groups. Solid Freeform Fabrication (SFF) technologies offer the potential for significantly reducing product realization cycle times in many economic sectors, from electromechanical and consumer products to the automotive and aerospace industries. SFF currently finds application mainly for prototype fabrication and limited production, but many researchers and commercial developers are intent upon developing these technologies into valid and viable manufacturing technologies. This research focuses on two keys to realizing this goal: (1) developing appropriate and robust data exchange standards for representing fabrication information; and (2) formalizing design-for-manufacture rules specific to SFF fabrication techniques. Similar challenges faced the microelectronics industry in its early days, and many researchers and practitioners have noted the similarities of integrated circuit fabrication and SFF manufacture. Completion of this research will provide a foundation for the computational aspects needed for SFF to realize success similar to the microelectronics industry.