CAREER: Improving the Access-Execute Balance in High Performance Processors

职业：改善高性能处理器的访问执行平衡

• 批准号: 9624378
• 负责人: Lizy John
• 金额: $ 11.5万
• 依托单位: University of South Florida
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1996
• 资助国家: 美国
• 起止时间: 1996-08-01 至 1999-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9624378&HistoricalAwards=false
• 关键词: CAREER; Improving; Access; Execute; Balance

Program behavior studies reveal that most current high performance processors spend more time computing addresses and accessing data than performing the functional operations required by application programs. This research consists of investigating issues in the design of a balanced multiple issues architecture that improves the access-execute balance, maximized the decoupling between the various functional units, exploits higher concurrency and achieves higher performance. The techniques used to alleviate access- execute imbalance include (I) executing multiple access tasks in parallel, (ii) providing architectural support for complex access primitives, and (iii) providing application- specific access primitives. Also performed will be investigations on improving concurrency between access and execute processes. Concurrency between access and execution has been exploited by queues in many decoupled access- execute architectures, but data dependent control dependencies often prohibit prefetching of data to queues. This research will investigate techniques to facilitate anticipatory loading to queues even in presence of data dependent control dependencies. The research will build on the PI's previous studies on accessexecute decoupling and other schemes to improve the performance of memory accessing. The PI is incorporating innovative techniques such as active learning, and cooperative learning into the classroom. She wants to emphasize design, design automation, and experimental aspects in her courses. As part of curriculum improvement, a new graduate course on Advanced Computer architecture and an undergraduate course and laboratory on Digital Design using FPGAs are being developed. The PI also plans to participate in outreach activities for high-school students and special programs for women and minorities. The overall objective is to stimulate efficient learning at graduate, undergraduate and pre-college levels of education. ***

计划行为研究表明，与执行应用程序要求的功能操作相比，大多数当前高性能处理器花费更多的时间计算地址和访问数据。这项研究包括调查平衡多个问题架构的设计问题，以改善访问执行的余额，最大化各种功能单元之间的去耦，利用更高的并发性并实现更高的性能。 用于减轻访问权限的技术包括（i）并行执行多个访问任务，（ii）为复杂的访问原始词提供架构支持，以及（iii）提供特定于应用程序 - 特定于应用程序的访问基础。 还将进行有关改善访问和执行过程之间并发的调查。 在许多脱钩的访问架构中，排队在访问和执行之间的并发性已经利用，但是数据依赖的控制依赖性通常禁止将数据预取至队列。 这项研究将研究即使存在数据依赖性控制依赖性，即使在存在数据依赖性控制的情况下，也将促进预期载荷到排队。这项研究将基于PI先前关于AccessEctecute解耦和其他方案的研究，以提高内存访问的性能。 PI正在将创新的技术（例如积极学习和合作学习）纳入课堂。 她想强调课程中的设计，设计自动化和实验方面。 作为课程改进的一部分，正在开发有关高级计算机架构的新研究生课程，以及使用FPGA的数字设计的本科课程和实验室。 PI还计划参加针对高中生的外展活动以及针对妇女和少数民族的特殊计划。 总体目的是刺激毕业，本科和大学教育水平的有效学习。 ***