Exploring Multiple Control Flows for ILP Processors

指令级并行（ILP）处理一直是计算机体系结构社区和半导体行业非常感兴趣的一个领域。自过去十年以来，几乎所有开发的处理器都以主要方式进行ILP处理。ILP处理的持续发展需要仔细检查在各种执行模型下存在于典型程序中的并行性的数量。本研究的主要目的是探讨在ILP处理器中追求多个控制流的潜力。该研究从量化不同控制流约束对可用并行性的影响开始。然后研究了追求多个控制流的软件支持。将控制独立性和数据独立性指定给硬件的新方法是软件支持研究的一部分。本研究还研究了与追求多个控制流相关的硬件问题，例如使用详细的仿真模型在推测路径数量和性能之间进行权衡。已经进行了初步的仿真研究，以了解单个控制流和多个控制流的并行度。这些初步结果表明，当追求多个控制流而不是单个控制流时，可用并行性增加了2倍。

Instruction-level parallel (ILP) processing has been an area of great interest in the computer architecture community and the semiconductor industry. Almost all of the processors developed since the last decade do ILP processing in a major way. Ongoing advances in ILP processing necessitate a careful examination of the amount of parallelism that exists in typical programs under various execution models. The main objective of this research is to investigate the potential of pursuing multiple control flows in ILP processors. The study starts by quantifying the effect of different control flow constraints on available parallelism. Software support for pursuing multiple control flows is then studied. Novel methods to specify control independence and data independence to the hardware are part of this study on software support. This research also studies hardware issues relevant to pursuing multiple control flows, such as tradeoffs between the number of speculative paths and performance using detailed simulation models. Preliminary simulation studies have been conducted to get an idea of the amount of parallelism available with single control flow and multiple control flows. These preliminary results indicate a factor of 2 increase in available parallelism when multiple control flows is pursued instead of a single control flow.