ITR: Real-Time Systems-on-a-Chip

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The embedded processor of the future will have multiple heterogeneous processors on a single chip integrated with a large shared memory. Many of the applications for this processor will have strict real-time requirements. This project investigates novel architectural and system software features that can allow such a processor to support complex real-time applications. Architectural features that limit shared memory contention and reduce synchronization overhead will be studied in order to reduce latencies and make thread execution times more predictable. The project will also explore the use of specialized I/O processors having direct and equal access to shared memory in order to minimize interference of I/O operations on real-time thread execution. Novel techniques for scheduling real-time threads on a heterogeneous multiprocessor-on-a-chip will also be studied.