ITR: High Density Analog Computing Arrays

ITR：高密度模拟计算阵列

• 批准号: 0083172
• 负责人: Jennifer Hasler
• 金额: $ 44.3万
• 依托单位: Georgia Tech Research Corporation
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2000
• 资助国家: 美国
• 起止时间: 2000-08-15 至 2004-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0083172&HistoricalAwards=false
• 关键词: ITR; Density; Analog; Computing; Arrays

EIA-0083172Hasler, PaulGeorgia Institute of TechnologyITR: High Density Analog Computing ArraysThis project is investigating an alternate model of real-time sensory signal processing based upon a mixture of analog and digital computation. The arrays under study perform analog computations directly in modified EEPROM memory cells; each cell acts as a multiplier that multiplies the input signal by an analog value stored on a floating gate. Potential advantages of analog computing arrays include lower latency than digital computers, lower power consumption, and parallel processing of many analog inputs. The project encompasses experimental demonstration of analog computing arrays, simulation and design tools to make the technology accessable to DSP designers, and investigation of the robustness and reliability of the technology. Several single-chip signal processing systems will be developed, including adaptive matched filters, a cepstrum calculater, systems for hidden Markov models, and a multi-directional filter array.

EIA-0083172 Hasler，PaulGeorgia Institute of Technology ITR：高密度模拟计算阵列该项目正在研究基于模拟和数字计算混合的实时感觉信号处理的替代模型。 所研究的阵列直接在修改的EEPROM存储单元中执行模拟计算;每个单元充当乘法器，将输入信号乘以存储在浮栅上的模拟值。 模拟计算阵列的潜在优势包括比数字计算机更低的延迟、更低的功耗以及许多模拟输入的并行处理。 该项目包括模拟计算阵列的实验演示，使DSP设计人员能够使用该技术的仿真和设计工具，以及该技术的鲁棒性和可靠性的调查。 几个单芯片信号处理系统将被开发，包括自适应匹配滤波器，倒谱计算器，隐马尔可夫模型系统，和一个多方向滤波器阵列。