ITR: High Density Analog Computing Arrays

hasler, PaulGeorgia Institute of technology， itr：高密度模拟计算阵列该项目正在研究一种基于模拟和数字计算混合的实时传感信号处理的替代模型。所研究的阵列直接在修改的EEPROM存储单元中进行模拟计算；每个单元充当一个乘法器，将输入信号乘以存储在浮动门上的模拟值。模拟计算阵列的潜在优势包括比数字计算机更低的延迟，更低的功耗，以及并行处理许多模拟输入。该项目包括模拟计算阵列的实验演示，仿真和设计工具，使DSP设计师能够使用该技术，并研究该技术的鲁棒性和可靠性。将开发几个单芯片信号处理系统，包括自适应匹配滤波器、倒谱计算器、隐马尔可夫模型系统和多向滤波器阵列。

EIA-0083172Hasler, PaulGeorgia Institute of TechnologyITR: High Density Analog Computing ArraysThis project is investigating an alternate model of real-time sensory signal processing based upon a mixture of analog and digital computation. The arrays under study perform analog computations directly in modified EEPROM memory cells; each cell acts as a multiplier that multiplies the input signal by an analog value stored on a floating gate. Potential advantages of analog computing arrays include lower latency than digital computers, lower power consumption, and parallel processing of many analog inputs. The project encompasses experimental demonstration of analog computing arrays, simulation and design tools to make the technology accessable to DSP designers, and investigation of the robustness and reliability of the technology. Several single-chip signal processing systems will be developed, including adaptive matched filters, a cepstrum calculater, systems for hidden Markov models, and a multi-directional filter array.