Architectural Support for Scalable High-Speed Routers

可扩展高速路由器的架构支持

• 批准号: 0105529
• 负责人: Nian-Feng Tzeng
• 金额: $ 30万
• 依托单位: University of Louisiana at Lafayette
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2001
• 资助国家: 美国
• 起止时间: 2001-09-01 至 2006-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0105529&HistoricalAwards=false
• 关键词: Architectural; Support; Scalable; Speed; Routers

Scalable high-speed routers are necessary to handle rapidly growing traffic in the Internet at the aggregated packet forwarding rates expected to reach terabits per second. This proposal deals with a novel router architecture with good scalability and capable of forwarding hundreds of millions of packets per second, in order to keep up with future transmission technologies. It aims to help advance the state-of-the-art of router design and to enable large networking configurations. The project contains both basic research and experimental systems activities, including the major objectives of (1) developing a fast packet classification subsystem (PCS), (2)pursuing a scalable switching fabric (SSF) for interconnecting line cards,(3) assessing the use of a simultaneous multithreading SMT) processor to replace the conventional processor(s) in each forwarding engine, and 4) investigating into effective fault-tolerant schemes for key router components. The first three objectives are related to router scalability and performance,whereas the last one is for reliability improvement, which is especially crucial as the router sizes grow. The fast PCS proposed comprises multiple forwarding engines and a novel cache-oriented multistage structure (COMS), which directs packets arriving at line cards to those forwarding engines for table lookups. The COMS caches lookup results at its constituent switching elements to enable fast and concurrent lookups of subsequent packets. Each forwarding engine keeps only partial routing/filter lookup tables, rather than full ones (as in any other router design). The SSF is based on PI's earlier switching fabric work, with an appropriate set of wrap-around connections and additional logics for hardware multicast support. An initial study on the use of an SMT processor to handle multiple table-lookup processes, with one thread for a process, is encouraging, and its extensive assessment will be conducted in this project. Caching lookup outcomes optimally in COMS will be modeled formally as a graph optimization problem, with its solution being developed. Research results from this project are likely to have material, positive impacts on future router design, advancing networking technologies to facilitate the continuous expansion of the Internet for years to come. They will also enrich the lecturing materials of such courses as computer communications and networks, network computing, and distributed systems.

可扩展的高速路由器是必要的，以处理互联网中快速增长的流量，预计将达到每秒太比特的聚合数据包转发速率。 该方案提出了一种新的路由器架构，具有良好的可扩展性，能够每秒转发数亿个数据包，以跟上未来的传输技术。 它旨在帮助推进路由器设计的最新水平，并支持大型网络配置。 该项目包括基础研究和实验系统活动，包括以下主要目标：（1）开发快速分组分类子系统（PCS），（2）寻求用于互连线路卡的可扩展交换结构（SSF），（3）评估使用同步多线程（SMT）处理器来取代每个转发引擎中的传统处理器，4）研究路由器关键部件的有效容错方案。 前三个目标与路由器的可扩展性和性能有关，而最后一个目标是提高可靠性，随着路由器规模的增长，这一点尤为重要。 提出的快速PCS包括多个转发引擎和一种新颖的面向缓存的多级结构（COMS），它将到达线路卡的分组定向到那些转发引擎进行表查找。 COMS在其组成交换元件处高速缓存查找结果，以实现后续分组的快速和并发查找。 每个转发引擎只保留部分路由/过滤器查找表，而不是完整的（如在任何其他路由器设计）。 SSF基于PI早期的交换结构工作，具有一组适当的环绕连接和用于硬件多播支持的附加逻辑。一个关于使用SMT处理器来处理多个查表进程（一个进程一个线程）的初步研究是令人鼓舞的，本项目将对其进行广泛的评估。 在COMS中最佳缓存查找结果将被正式建模为一个图优化问题，其解决方案正在开发中。 该项目的研究结果可能对未来的路由器设计产生重大的积极影响，推进网络技术，以促进未来几年互联网的持续扩展。 丰富了计算机通信与网络、网络计算、分布式系统等课程的教学内容。