SBIR Phase I: Hardware Support for 10 Gbps Intrusion Detection

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This Small Business Innovation Research (SBIR) Phase Iresearch project addresses the need of business and government organizations to monitor and protect their high-speed electronic networks. Current network intrusion detection technologies are based on software or network processors, both of which are essentially serial in nature, and cannot meet the speed requirements of 10 Gbps networks. The proposed research intends to demonstrate the feasibility of using a novel, massively parallel architecture specifically designed for high-speed intrusion detection. The objective of this project is to take an existing intrusion detection acceleration design implemented for 1 Gbps network, and extend it to meet 10 Gbps requirements. Specifically, this research outlines a path to (1) determine the proper architecture extension needed to achieve 10 Gbps throughput, (2) create the actual logic design, and (3) perform simulation to prove that the design can indeed handle 10 Gbps. It is anticipated that the research will show that an extension of the architecture can indeed handle 10 Gbps. An eventual application is to deploy the hardware detection engine in a complete intrusion detection solution and enabling the solution to operate in a live 10 Gbps network.Today's networks are still vulnerable to hackers, cyber criminals, and cyber terrorists. An architecture which can scale with both (1) the increase in the number and complexity of signatures and (2) the increase in network speeds, is needed not only to meet today's security needs, but also to lay out the groundwork for future intrusion detection and other network surveillance systems. Network managers will be able to upgrade the security of their networks in a shorter period of time and at a lower cost.