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CAREER: Modular Verification of Software

CAREER: Modular Verification of Software
职业:软件的模块化验证
批准号:
0546170
负责人:
Rupak Majumdar
金额:
$32.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2006
资助国家:
美国
项目状态:
已结题
起止时间:
2006-03-15 至 2012-02-29

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ABSTRACT0546170Rupak MajumdarUniversity of California - Los Angeles,Modular Verification of Software MajumdarIntellectual Merits. Writing correct software is hard. Our techniques to ensure software reliabilitylag far behind our requirements for more and more complex systems. Unlike for lowlevel correctness requirements (such as correct syntax, or correct use of types), application level properties are currently not specifiable or automatically checkable. Testing remains the dominant methodology to ensure software quality with regard to application level properties, however, it is not exhaustive, and nasty bugs are often exposed post-deployment. Thus, the availability of analyses that can automatically check higher-level properties of large software systems soundly and precisely will mark a major advance in our ability to develop more reliable software. This project leverages recent advances in software verification and explores new ideas to significantly extend the capabilities of modern verification tools to handle larger programs and more complex properties. We contend that the leap to scalably verifying end-to-end properties of softwarewill be enabled by novel techniques in modular software verification, over and above existing techniques like model checking, predicate abstraction, and abstraction refinement. While the basic principles of modularity in system verification have been known for decades, they have not been widely adopted in program analysis tools because there is no push-button way to apply them in full generality. We focus on the technical challenges in automating modular verification by studying the following widely occurring verification patterns. Tighter integration of type information in model checking through predicated types. Automatically synthesizing temporal interfaces that specify behavioral requirements. Integration of abstract data types into symbolic reasoning. Automatic parameterized verification through design decomposition. Our research will immediately benefit any large software system where robustness and reliability are pressing concerns; we shall validate our research by verifying end-to-end properties of enterprise applications and high performance servers from which we derived the verification patterns and which are beyond the scope of current tools.
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SHF: EAGER: Closing the gap in Controller Synthesis
  • 批准号:
    0953994
  • 项目类别:
    Standard Grant
  • 资助金额:
    $20.0万
  • 财政年份:
    2009
  • 负责人:
    Rupak Majumdar
  • 依托单位:
CSR---EHS: Collaborative: Directed Real-Time Testing
  • 批准号:
    0720881
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $22.5万
  • 财政年份:
    2007
  • 负责人:
    Rupak Majumdar
  • 依托单位:
Collaborative: Software Verification for Hardware Models
  • 批准号:
    0702743
  • 项目类别:
    Standard Grant
  • 资助金额:
    $25.0万
  • 财政年份:
    2007
  • 负责人:
    Rupak Majumdar
  • 依托单位:
国内基金
海外基金
基于Modular积图和最大团的草图形状匹配技术研究
  • 批准号:
    61305091
  • 项目类别:
    青年科学基金项目
  • 资助金额:
    25.0万元
  • 批准年份:
    2013
  • 负责人:
    梁爽
  • 依托单位: