Collaborative Research: CSR --- SMA: Thermal Modeling, Simulation and Management of Memory Subsystems for Multi-Core Systems
合作研究:CSR --- SMA:多核系统内存子系统的热建模、仿真和管理
基本信息
- 批准号:0720609
- 负责人:
- 金额:$ 4万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2007
- 资助国家:美国
- 起止时间:2007-08-01 至 2008-07-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
With the demand for high memory performance from multi-core processors, memory subsystem has become a new thermal concern after processor and hard drive. Smooth and efficient memory thermal management schemes must be developed to meet the challenge. There also lack memory thermal models and simulation tools in the public domain for research and education. This project proposes memory thermal models and thermal simulators for DRAM memory subsystems as well as efficient DTM (dynamic thermal management) methods. The investigators develop a simple and accurate dynamic thermal model based on fully buffered DIMM and an accurate and fast two-level simulator estimating the thermal behavior of a memory subsystem. They also study several new, system-level DTM schemes that coordinate DRAM thermal management with processor performance throttling. Several new DTM methods are to be developed. The first method, Adaptive Core Gating, adjusts the number of active cores according to the memory thermal status.The second method, Coordinated DVFS (dynamic voltage and frequency scaling), proactively scales down the processor frequency and voltage upon memory thermal emergency, reducing both the DRAM heat generation and the processor power consumption. Furthermore, thermal-aware OS job scheduling smoothes memory traffic and DRAM heat generation by mixing jobs with different memory demands appropriately. The thermal model is validated to execution on hardware platforms; and the proposed methods are evaluated on real systems.
随着多核处理器对存储器性能的要求越来越高,存储器子系统已成为继处理器和硬盘之后新的热问题。为了应对这一挑战,必须开发出流畅高效的存储器热管理方案。在公共领域也缺乏用于研究和教育的内存热模型和仿真工具。本项目提出内存热模型和热模拟器的DRAM内存子系统,以及有效的DTM(动态热管理)方法。研究人员开发了基于全缓冲DIMM的简单准确的动态热模型和准确快速的两级模拟器来估计存储子系统的热行为。他们还研究了几种新的系统级DTM方案,这些方案将DRAM热管理与处理器性能调节相协调。一些新的DTM方法将被开发出来。第一种方法,自适应核门控,根据内存热状态调整活动核的数量。第二种方法,协调DVFS(动态电压和频率缩放),在存储器热紧急情况下主动降低处理器频率和电压,减少DRAM发热量和处理器功耗。此外,热感知操作系统作业调度通过适当混合具有不同内存需求的作业来平滑内存流量和DRAM热生成。验证了热模型在硬件平台上的运行;并在实际系统中对所提方法进行了评价。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Zhao Zhang其他文献
A 1-V 5.2–5.7 GHz low noise sub-sampling phase locked loop in 0.18 μm CMOS
采用 0.18 μm CMOS 封装的 1V 5.2–5.7 GHz 低噪声子采样锁相环
- DOI:
10.1109/asicon.2015.7517130 - 发表时间:
2015 - 期刊:
- 影响因子:0
- 作者:
Jincheng Yang;Zhao Zhang;P. Feng;Liyuan Liu;N. Wu - 通讯作者:
N. Wu
Probe-Type Microforce Sensor for Mirco/Nano Experimental Mechanics
用于微/纳米实验力学的探针式微力传感器
- DOI:
10.4028/www.scientific.net/amr.33-37.943 - 发表时间:
2008-03 - 期刊:
- 影响因子:0
- 作者:
Xide Li;Zhao Zhang - 通讯作者:
Zhao Zhang
3D trajectory tracking control of an underactuated AUV based on adaptive neural network dynamic surface
基于自适应神经网络动态面的欠驱动AUV 3D轨迹跟踪控制
- DOI:
10.1504/ijvd.2020.115864 - 发表时间:
2020 - 期刊:
- 影响因子:0.5
- 作者:
Xiao Liang;Zhao Zhang;Xingru Qu - 通讯作者:
Xingru Qu
An efficient and convenient formal synthesis of Jaspine B from D-xylose.
由 D-木糖高效、便捷地正式合成 Jaspine B。
- DOI:
10.1016/j.carres.2012.01.013 - 发表时间:
2012-04 - 期刊:
- 影响因子:3.1
- 作者:
Zhao Zhang;Yu-Tao Zhao;Wen Qu;Hong-Min Liu - 通讯作者:
Hong-Min Liu
Development of a Procedure for Prioritizing Intersection Improvement Projects Considering Safety and Operational Factors
制定考虑安全和运营因素的交叉口改善项目优先顺序的程序
- DOI:
10.1080/19439962.2011.614374 - 发表时间:
2012 - 期刊:
- 影响因子:0
- 作者:
Zhenyu Wang;Zhao Zhang;J. Lu;Jianyou Zhao - 通讯作者:
Jianyou Zhao
Zhao Zhang的其他文献
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{{ truncateString('Zhao Zhang', 18)}}的其他基金
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合作研究:框架:钻石:科学大型神经网络模型训练的民主化
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- 批准号:
2401245 - 财政年份:2023
- 资助金额:
$ 4万 - 项目类别:
Standard Grant
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- 批准号:
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- 资助金额:
$ 4万 - 项目类别:
Standard Grant
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- 批准号:
1643271 - 财政年份:2016
- 资助金额:
$ 4万 - 项目类别:
Continuing Grant
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