Collaborative Research: Design, Modeling, Automation and Experimentation of Nanoscale Computing Fabric using Carbon Nanotubes

合作研究:使用碳纳米管的纳米级计算结构的设计、建模、自动化和实验

基本信息

  • 批准号:
    0726807
  • 负责人:
  • 金额:
    $ 4万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2007
  • 资助国家:
    美国
  • 起止时间:
    2007-10-01 至 2010-09-30
  • 项目状态:
    已结题

项目摘要

Device scaling of silicon transistors has been the fundamental basis for the phenomenal success of the semiconductor industry. Such scaling is reaching a point where it is absolutely necessary to explore new devices as replacement for traditional silicon transistors. Otherwise, the progress of the semiconductor industry will be severely affected. Carbon Nanotube Field-Effect Transistors (CNFETs) are promising candidates as extensions to traditional Silicon transistors due to excellent device performance. While there have been significant accomplishments in scientific discovery of CNFETs in recent years at the single-device level, a major gap exists between such single-device-level results and the research required to harness the science into practical design technologies at the end of device scaling of silicon transistors. This research project targets to close this gap by developing necessary technologies required to make CNFETs practical candidates for replacing silicon transistors. The objective of this research is to design of robust nanoscale computing fabrics using Carbon Nanotube Field Effect Transistors (CNFETs) in the presence of inherent limitations and imperfections, and to experimentally demonstrate essential components of a fabric such as a processor. This research is motivated by the fact that CNFETs are promising candidates as extensions to Silicon CMOS, yet fundamental nanoscale challenges prevent successful implementations of efficient CNFET-based circuits and systems. This project includes an interdisciplinary research team to demonstrate robust CNFET-based computing fabrics, and also to educate future generations of engineers and the general public in the emerging field of nanoscale computing.
硅晶体管的器件缩放是半导体工业取得巨大成功的根本基础。这样的规模已经达到了一个临界点,绝对有必要探索新的器件来替代传统的硅晶体管。否则,半导体行业的进步将受到严重影响。碳纳米管场效应晶体管(CNFET)由于其优异的器件性能而成为传统硅晶体管的延伸。虽然近年来在单器件水平上CNFET的科学发现方面取得了重大成就,但在这种单器件水平的结果与在硅晶体管的器件缩放结束时将科学应用于实际设计技术所需的研究之间存在重大差距。该研究项目旨在通过开发必要的技术来缩小这一差距,使CNFET成为替代硅晶体管的实际候选者。本研究的目的是使用碳纳米管场效应晶体管(CNFET)在存在固有的限制和缺陷的情况下设计鲁棒的纳米级计算织物,并通过实验证明织物的基本组件,如处理器。这项研究的动机是,CNFET是有前途的候选人作为硅CMOS的扩展,但基本的纳米尺度的挑战,防止有效的CNFET为基础的电路和系统的成功实施。该项目包括一个跨学科的研究团队,以展示强大的基于CNFET的计算结构,并教育未来几代工程师和公众在新兴的纳米级计算领域。

项目成果

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Mehdi Tahoori其他文献

Mehdi Tahoori的其他文献

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{{ truncateString('Mehdi Tahoori', 18)}}的其他基金

CAREER: Adaptive and Built-in Defect and Fault Tolerance for Crossbar Nano-architectures
职业:Crossbar 纳米架构的自适应内置缺陷和容错能力
  • 批准号:
    0746836
  • 财政年份:
    2008
  • 资助金额:
    $ 4万
  • 项目类别:
    Continuing Grant

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