Signal Processing to the Rescue of Moore's Law

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This project seeks to provide effective and low-cost solutions to the power-reliability problem inhibiting the growth of the $250B global semiconductor industry today. This is the industry that manufactures integrated circuits (ICs) or micro-chips that lie at the heart of consumer electronics, communications and computing products such as cell-phones, lap-tops, personal digital assistants, modems, routers, and many others. Moore?s Law, a self-fulfilling prophesy driving innovation and growth in the industry since the 70s, predicts that the number of transistors per unit area will double every 18 months. Moore?s Law is under threat from two trends: emergence of nanometer non-idealities that make it hard to design reliable chips, and increased functionality demanded by new applications and standards resulting in high power consumption. This is then the power-reliability problem which threatens Moore?s Law. In this project, the investigators are employing the power of signal processing theory and techniques to solve the power-reliability problem described above in the context of ICs for broadband communication systems by viewing nanometer ICs as noisy communication networks. The research is organized into three major activities. First, parameterized statistical behavioral models for digital signal processing (DSP)-specific blocks such as data-path, computation, memory, and on-chip communication blocks will be developed. Next, signal processing-inspired techniques will be investigated for designing robust and energy-efficient implementations of signal processing and communication systems by employing the behavioral models and using concepts from statistical signal processing theory such as adaptive filtering, detection and estimation, error-control and distributed and robust systems theory. Finally, a prototype test chip demonstrating the potential of one or more of the techniques will be implemented and tested in the final year of the project.