Dithering Techniques for Delta-Sigma Modulator Based Digital-to-Analog Converters
基于 Delta-Sigma 调制器的数模转换器的抖动技术
基本信息
- 批准号:0824279
- 负责人:
- 金额:$ 33万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2008
- 资助国家:美国
- 起止时间:2008-09-01 至 2013-03-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
The objective of this research is to develop signal processing theories and techniques to combat circuit impairments such as sizing errors and nonlinear device behavior in practical, integrated, delta-sigma modulator based digital-to-analog converters (DACs). These DACs are vital components in many electronic systems including radio transceivers and audio and video equipment. The proposed approach is to use random dithering of the delta-sigma modulator input signal to condition the statistics of its quantization noise; such conditioning will reduce the DAC's sensitivity to the aforementioned circuit errors. The expected outcome of the research is high performance DACs that are easy to design and sufficiently robust to offer high fabrication yields, unlike traditional DACs that are designed using extensive simulation-based optimization strategies.The intellectual merit of the research is that it presents a fundamentally different approach to combating circuit errors in DACs: an approach that does not depend on circuit optimization but applies signal processing techniques to improve circuit performance. Furthermore, the research aims at realigning theoretical data converter research to address relevant problems faced by practical circuit designers.The broader impacts of the project are two-fold. First, it addresses the problem of building high performance digital-to-analog converters that are crucial to the growth of the electronics industry. Second, it will encourage students from underrepresented groups to take up advanced engineering careers by providing graduate students and summer interns recruited specifically from such groups to work on the proposed project under close supervision of the PI.
本研究的目的是发展信号处理理论和技术,以对抗电路损伤,如尺寸误差和非线性器件行为,在实际的,集成的,基于Δ-Σ调制器的数模转换器(DAC)。 这些DAC是许多电子系统(包括无线电收发器和音频和视频设备)中的重要组件。 所提出的方法是使用Δ-Σ调制器输入信号的随机抖动来调节其量化噪声的统计数据;这种调节将降低DAC对上述电路误差的敏感度。 该研究的预期成果是高性能DAC,这些DAC易于设计且足够稳健,可提供高制造成品率,而不像传统DAC那样使用基于大量仿真的优化策略进行设计。该研究的智力价值在于,它提出了一种从根本上不同的方法来对抗DAC中的电路误差:一种不依赖于电路优化而是应用信号处理技术来改善电路性能的方法。 此外,该研究旨在重新调整理论数据转换器的研究,以解决实际电路设计人员面临的相关问题。 首先,它解决了构建对电子行业增长至关重要的高性能数模转换器的问题。 第二,它将鼓励来自代表性不足群体的学生从事先进的工程职业,方法是提供专门从这些群体招募的研究生和暑期实习生,在PI的密切监督下从事拟议项目。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Sudhakar Pamarti其他文献
Sudhakar Pamarti的其他文献
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