Direct RF-to-Digital Data Converters Using Time-Varying Circuits
Direct RF-to-Digital Data Converters Using Time-Varying Circuits
批准号:
1810268
负责人:
Sudhakar Pamarti
金额:
$33.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2018
资助国家:
美国
项目状态:
已结题
起止时间:
2018-08-15 至 2023-03-31
中文摘要
应用要求我们的便携式设备提供越来越多的多样化无线通信,如蜂窝、WiFi、GPS、蓝牙和专有通信,使可穿戴和可植入设备能够有效地与智能手机连接。因此,希望有一个紧凑的单一通用无线电,类似于Dick Tracy手表无线电,以无缝地处理大量这样的通信。不幸的是,这种通用无线电被证明是出了名的难以制造,特别是在便携式通信设备中使用。该项目旨在为这种通用无线电的核心部分开发技术:一种模数转换器,可以精确地数字化入射到天线上的大片电磁信号频谱,同时消耗低电池功率。这项技术将使无线电硬件能够在方便的软件控制下重新配置。此外,它还将使所谓的认知无线电能够通过动态识别和机会主义地使用空闲的频段来提高稀缺电磁频谱的利用率。通用无线电和认知无线电对于进一步促进该国的无线连接至关重要。开发的技术可用于国防电子设备和医疗设备,在这些设备中,电磁频谱感知和感知对成像和安全应用非常重要。除了技术影响外,拟议的研究活动还将为加州大学洛杉矶分校的不同本科生和研究生提供宝贵的培训,使他们了解信号处理和电子电路设计技术之间的强大相互作用。这种跨学科的培训将帮助工程师更好地应对电气工程中的许多不断变化的挑战。该项目的目标是开发电路和信号处理技术,以实现宽带、高分辨率、模数转换器(ADC),这些ADC可以放置在接收器中的天线上或非常接近天线。该方法采用了多速率滤波器组概念和时变电路。简而言之,一组由特别选择的周期性时变电路元件组成的模拟滤波器将被用来将RF信号引导到单独但重叠的频段,然后使用一组速度较慢的ADC进行数字化。一组数字滤波器将智能地组合ADC输出,以忠实地重建原始信号。原型集成电路将被设计、制造和测试,以验证建议的直接RF-数字转换器的可行性和实用性,并展示创纪录的ADC带宽和分辨率组合。这个项目的学术价值有三个方面。最重要的是,它将开发一种新的频率信道化ADC方法,与传统的时间交错ADC方法相比,该方法对电路失配不那么敏感,并放宽了动态范围要求。其次,时变电路技术是对使电路线性化和时不变的传统原则的根本和有益的背离,将导致显著的性能和功耗效益。时变方法使得能够对频率信道化滤波器进行非常高的线性度和精度控制,以解决使用模拟前置滤波器组的所有现有ADC方法的中心问题。最后,拟议的研究代表了集成电路设计和信号处理理论之间的紧密耦合,对于解决集成电路设计中的突出问题正变得越来越重要。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Applications demand our portable devices to provide an ever-increasing number of diverse wireless communications such as cellular, WiFi, GPS, Bluetooth, and proprietary communications that allow wearable and implantable devices to link efficiently with a smartphone. As such, it is desirable to have a compact single universal radio, similar to a Dick Tracy wristwatch radio, to seamlessly handle the multitude of such communications. Unfortunately, such a universal radio has proven notoriously hard to build, especially for use in a portable communications device. This project aims to develop the technology for the central piece of this universal radio: an analog-to-digital converter that precisely digitizes a large swath of the electromagnetic signal spectrum incident on an antenna while consuming low battery power. The technology will enable radio hardware that can be reconfigured under convenient software control. In addition, it will enable the so-called cognitive radios that increase the utilization of scarce electromagnetic spectrum by dynamically identifying and opportunistically using vacant frequency bands. Both universal and cognitive radios are critically important to the further advancement of wireless connectivity in the country. The developed technology can find use in defense electronics and medical equipment where electromagnetic spectrum sensing and awareness is important for imaging and security applications. In addition to the technical impact, the proposed research activities will provide the diverse undergraduate and graduate students at the University of California, Los Angeles, with invaluable training in the strong interplay between signal processing and electronic circuit design techniques. Such cross-disciplinary training will help engineers better tackle many of the evolving challenges in electrical engineering.The objective of this project is to develop circuit and signal processing techniques to enable wide bandwidth, high resolution, analog-to-digital converters (ADCs) that can be placed at, or very close to, the antenna in a receiver. The proposed approach employs multi-rate filter-bank concepts and time-varying circuits. In a nutshell, a bank of analog filters, made of specially chosen, periodically time-varying circuit components, will be employed to channelize the RF signal into individual, but overlapping, frequency bands that are then digitized using a bank of slower ADCs. A bank of digital filters will intelligently combine the ADC outputs to faithfully reconstruct the original signal. Prototype integrated circuits will be designed, fabricated, and tested to verify the feasibility and utility of the proposed direct RF-to-digital converters and demonstrate record-setting ADC bandwidth and resolution combinations. The intellectual merits of this project are three-fold. Foremost, it will develop a new frequency-channelization ADC approach that is less sensitive to circuit mismatch and has relaxed dynamic range requirements as compared to the conventional time-interleaved ADC approach. Secondly, the time-varying circuit technique, which is a radical and beneficial departure from the conventional principle of making circuits linear and time-invariant, will lead to significant performance and power consumption benefits. The time-varying approach enables very high linearity and precision control of the frequency channelization filter to solve the central problem of all prior ADC approaches that use a bank of analog pre-filters. Finally, the proposed research represents a very tight coupling between integrated circuit design and signal processing theory that is becoming increasingly essential to solve the outstanding problems in integrated circuit design.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(5)
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6.3 A 0.9V Dual-Channel Filtering-by-Aliasing Receiver Front-End Achieving +35dBm IIP 3 and
6.3 A 0.9V 双通道混叠滤波接收器前端实现 35dBm IIP 3 和
DOI:
10.1109/isscc42613.2021.9366017
发表时间:
2021
期刊:
2021 IEEE International Solid State Circuits Conference
影响因子:
--
作者:
[Bu, Shi, Pamarti, Sudhakar]
通讯作者:
Pamarti, Sudhakar
An LPTV Noise Cancellation Technique for a 0.9-V Filtering-by-Aliasing Receiver Front-End with >67-dB Stopband Rejection
适用于具有 >67dB 阻带抑制的 0.9V 混叠滤波接收器前端的 LPTV 噪声消除技术
DOI:
10.1109/cicc.2019.8780315
发表时间:
2019
期刊:
2019 IEEE Custom Integrated Circuits Conference
影响因子:
--
作者:
[Bu, Shi, Hameed, Sameed, Pamarti, Sudhakar]
通讯作者:
Pamarti, Sudhakar
A Dual-Channel High-Linearity Filtering-by-Aliasing Receiver Front-End Supporting Carrier Aggregation
支持载波聚合的双通道高线性混叠滤波接收器前端
DOI:
10.1109/jssc.2021.3112183
发表时间:
2022
期刊:
IEEE Journal of Solid-State Circuits
影响因子:
5.4
作者:
[Bu, Shi, Pamarti, Sudhakar]
通讯作者:
Pamarti, Sudhakar
DOI:
--
发表时间:
2022
期刊:
International Symposium on Circuits and Systems Proceedings
影响因子:
--
作者:
[Shi Bu, Sudhakar Pamarti]
通讯作者:
Shi Bu, Sudhakar Pamarti
Periodically Time-Varying Noise Cancellation for Filtering-by-Aliasing Receiver Front Ends
通过混叠接收器前端进行周期性时变噪声消除
DOI:
10.1109/jssc.2020.3028357
发表时间:
2021
期刊:
IEEE Journal of Solid-State Circuits
影响因子:
5.4
作者:
[Bu, Shi, Hameed, Sameed, Pamarti, Sudhakar]
通讯作者:
Pamarti, Sudhakar
Filtering by Aliasing: Sharp Programmable Integrated Filters using Simple Time-Varying Components
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批准号:1408647
-
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资助金额:$39.98万
-
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依托单位:
Dynamic Power Amplifier Architectures for High Average Efficiencies
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批准号:1102123
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资助金额:$35.97万
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CAREER: Digital Signal Conditioning Techniques to Improve Integrated Circuit Design Performance
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Dithering Techniques for Delta-Sigma Modulator Based Digital-to-Analog Converters
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Enabling Almost Digital, Power Efficient, Wireless Transmitters
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批准号:0725785
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