EMT/NANO: Hybrid CMOS-Nano-CMOS Architectures and CAD Tools for Nanoelectronic and Bio-Inspired Applications

EMT/NANO：用于纳米电子和仿生应用的混合 CMOS-Nano-CMOS 架构和 CAD 工具

• 批准号: 0829824
• 负责人: Garrett Rose
• 金额: $ 10万
• 依托单位: Polytechnic University of New York
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-15 至 2009-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0829824&HistoricalAwards=false
• 关键词: EMT; NANO; Hybrid; CMOS; Nano

Hybrid CMOS-Nano-CMOS Architectures and CAD Tools for Nanoelectronic and Bio-Inspired ApplicationsAbstractEmerging within the still novel field of nanoelectronics are many technologies that offer features such as reconfigurability, non-volatile memory, and low power consumption. Through this work, we intend to explore ways in which such attractive properties can be exploited in the design and development of a high-density reconfigurable architecture. This project combines two leading technological concepts for the development of future electronic systems: hybrid CMOS-nanoelectronic circuits and 3D integration. Our project will focus on studying methodologies associated with the design and development of novel 3D CMOS-nano-CMOS circuits. Specifically, we will prototype and evaluate a small hybrid CMOS-nano circuit consisting of a multistage nanoscale PLA based on metal oxide nanoelectronic switches with a direct interface to a layer of CMOS circuitry. The goal of this project is to lay the groundwork for developing more complex 3D CMOS-nano systems in the future. As part of this research, we will study methods for accurately modeling nanoelectronic devices and circuits for robust design, optimizing CMOS-nano-CMOS circuit designs using state of the art CAD techniques and fabricating and integrating these different technologies on a single die.

用于纳米电子和生物启发应用的混合CMOS-Nano-CMOS体系结构和CAD工具摘要在纳米电子学的仍然新颖的领域中出现了许多技术，这些技术提供了诸如可重新配置性、非易失性存储器和低功耗的特征。通过这项工作，我们打算探索的方式，这种有吸引力的属性可以利用在设计和开发的高密度可重构架构。该项目结合了未来电子系统开发的两个领先技术概念：混合CMOS-纳米电子电路和3D集成。我们的项目将专注于研究与新型3D CMOS-纳米CMOS电路的设计和开发相关的方法。具体来说，我们将原型和评估一个小型的混合CMOS纳米电路组成的多级纳米级PLA的基础上的金属氧化物纳米电子开关与直接接口的CMOS电路层。该项目的目标是为未来开发更复杂的3D CMOS纳米系统奠定基础。作为这项研究的一部分，我们将研究方法，精确建模纳米电子器件和电路的鲁棒设计，优化CMOS纳米CMOS电路设计使用最先进的CAD技术和制造和集成这些不同的技术在一个单一的模具。