CAREER: Architectural Enhancement and Design Methodologies for Secure Processing in Embedded Systems

职业：嵌入式系统安全处理的架构增强和设计方法

• 批准号: 0845871
• 负责人: Rajeev Bansal
• 金额: $ 40.5万
• 依托单位: University of Connecticut
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-09-01 至 2014-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0845871&HistoricalAwards=false
• 关键词: CAREER; Architectural; Enhancement; Design; Methodologies

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law III-5).With pervasive usage of embedded systems in our daily life and infrastructures, strengthening the security of embedded system in its design and implementation has become a critical priority for the research community. This project targets augmenting the processor architecture for run-time secure processing. Since the architectural support can be made transparent to upper-level software, it cannot be easily circumvented by new software security attacks. Meanwhile, in-processor changes offer great efficiency. We are pursuing three research objectives to address random memory corruption caused by software attacks. First, we explore effective architectural augmentations of embedded processors to monitor code integrity, and incorporate the monitor in a realistic application-specific instruction set processors (ASIPs) design flow. Second, we utilize the embedded speculative architectures of processors as a cache for legitimate behaviors to validate program control flow, protecting control data and decision-making data. The program execution validations are sampled at critical points to reduce the performance degradation. Third, we scale architectural support in a single-core environment up to more sophisticated and increasingly popular multi-core platforms. A suite of CAD design tools will be released to public for free use. Our approach will lead to a real impact on modern secure embedded processor design. The project will also facilitate the integration of research and education across multiple disciplines, and the PI is especially keen on promoting participation of traditionally underrepresented minorities and women in such domains.

该奖项根据《2009 年美国复苏和再投资法案》（公法 III-5）提供资助。随着嵌入式系统在我们日常生活和基础设施中的普遍使用，加强嵌入式系统设计和实施的安全性已成为研究界的首要任务。该项目的目标是增强处理器架构以实现运行时安全处理。由于架构支持可以对上层软件透明，因此新的软件安全攻击无法轻易规避。同时，处理器内的更改提供了很高的效率。我们正在追求三个研究目标，以解决软件攻击引起的随机内存损坏问题。首先，我们探索嵌入式处理器的有效架构增强以监控代码完整性，并将监控器合并到实际的特定于应用程序的指令集处理器（ASIP）设计流程中。其次，我们利用处理器的嵌入式推测架构作为合法行为的缓存来验证程序控制流，保护控制数据和决策数据。在关键点对程序执行验证进行采样，以减少性能下降。第三，我们将单核环境中的架构支持扩展到更复杂和日益流行的多核平台。一套CAD设计工具将向公众免费开放。我们的方法将对现代安全嵌入式处理器设计产生真正的影响。该项目还将促进跨多个学科的研究和教育的整合，PI 特别热衷于促进传统上代表性不足的少数群体和妇女参与这些领域。