II-EN: Infrastructure Acquisition for Statistical Power, Leakage, and Timing Modeling Towards Realization of Robust Complex Nanoelectronic Circuits

II-EN：统计功率、泄漏和时序建模的基础设施采集，以实现鲁棒的复杂纳米电子电路

• 批准号: 0854182
• 负责人: Saraju Mohanty
• 金额: $ 24.93万
• 依托单位: University of North Texas
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-08-01 至 2012-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0854182&HistoricalAwards=false
• 关键词: II; EN; Infrastructure; Acquisition; Statistical

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).Accurate modeling of power, leakage, and timing while accounting for process variations, is crucial for the manufacturable design of nanoscale CMOS integrated circuits. Thus, there is a pressing need for statistical models that allow design engineers to make fast architectural or system level design space exploration without resorting to a complete design iteration, from system to physical level. The thrust of the project's methodology is the progression of data transfer from lowest (transistor) to highest (system) level while utilizing minimal data from actual silicon. This allows for fast concurrent design for manufacturing of new systems with a clear delineation of the needed data at every level.To conduct research on nanoscale CMOS modeling that can be used for realization of robust circuits, and to make the deliverables available to the VLSI and educational communities, the project utilizes the following infrastructure: (1) Specialized equipment: mixed-signal analyzer, probing station and arbitrary waveform generator for sample data collection, probing and analysis for model validation.(2) Computing resources: a high-end, 4 processor server with 16-GB local memory and 4-TB RAID5 storage to be used by two faculty members and 10 students for nanoscale data acquisition, control, analysis, and storage.(3) Research and development personnel to develop the models and libraries, to validate the methodology, and to maintain the infrastructure.The educational impact of the project is 3-fold: impact on curricula at UNT, impact on curricula of other researchers who will use this infrastructure, and impact on the community colleges around the Dallas-Fort Worth metroplex.

该奖项是根据2009年美国复苏和再投资法案（公法111-5）资助的。准确建模的功率，泄漏和时序，同时考虑工艺变化，是至关重要的纳米级CMOS集成电路的可制造设计。因此，有一个迫切需要的统计模型，使设计工程师能够快速架构或系统级的设计空间探索，而不诉诸一个完整的设计迭代，从系统到物理水平。该项目方法的主旨是从最低（晶体管）到最高（系统）级别的数据传输的进展，同时利用来自实际硅的最少数据。这使得新系统的制造可以快速并行设计，并在每个层次上清晰地描述所需的数据。为了对可用于实现鲁棒电路的纳米级CMOS建模进行研究，并将成果提供给VLSI和教育界，该项目使用了以下基础设施：（1）专用设备：混合信号分析仪、探测站和任意波形发生器，用于样本数据收集、探测和分析，以进行模型验证。(2)计算资源：一个高端的4处理器服务器，具有16 GB本地内存和4 TB RAID 5存储，供两名教师和10名学生用于纳米级数据采集、控制、分析和存储。(3)研究和开发人员开发的模型和图书馆，以验证的方法，并维护基础设施。该项目的教育影响是3倍：在UNT课程的影响，对课程的其他研究人员谁将使用这个基础设施的影响，并对达拉斯-沃斯堡大都市周围的社区学院的影响。