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BRIGE: Development of Self-Programmable CMOS Analog Circuits and Systems

BRIGE: Development of Self-Programmable CMOS Analog Circuits and Systems
BRIGE:自编程 CMOS 模拟电路和系统的开发
批准号:
0927011
负责人:
Guillermo Serrano
金额:
$17.46万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-01 至 2012-08-31

项目摘要

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中文摘要
翻译
BRIGE:自编程CMOS模拟电路和系统的发展当今严格的低功耗要求,沿着减小的信号摆幅,给模拟电路设计者提出了一个重要的问题。此外,由于技术扩展,器件失配日益增加,迫使设计人员寻找替代设计方法。可编程/可重构电子,用于模拟域,最近出现了这些问题的可行的解决方案。智力优势:拟议的研究旨在通过开发可自编程模拟存储器元件来推进模拟电路设计的最新水平。 这项工作的主要努力将集中在开发一个电路基础设施,将允许自动编程的可重构电路。所提出的架构旨在从设计师那里抽象出编程问题,从而大大简化了这些设备的使用。 所开发的自编程架构将通过处理浮栅晶体管所涉及的编程问题,为开发新型高性能可编程/可重构电路和系统奠定基础。 此外,这项工作将使用开发的架构作为一种新的工具,设计新颖的高性能模拟电路。所提出的自编程存储器也将被纳入大规模现场可编程阵列的设计中,从而实现更快的编程周期。本研究的智力价值包括设计和开发:1)用于模拟存储器和可重构系统的片上自编程电路基础设施,2)可编程温度不敏感电压/电流基准,3)可编程低压差稳压器,4)用于快速编程周期的大规模现场可编程模拟阵列。拟议的研究工作将产生广泛的影响,通过开发一个核心架构的自编程可重构电路和系统,将广泛使用的电路设计师在模拟社区。 开发的架构将成为一种新的工具,使设计师能够克服当今技术中存在的研究挑战。 从教育的角度来看,拟议的工作将提供研究经验,高年级本科生和研究生,在波多黎各大学-马亚圭斯,在设计,制造和测试的微电子器件。 这种经验肯定会补充他们的学术准备,允许下一代西班牙裔专业人士在集成电路设计领域的培训。 此外,对本提案中概述的研究和教育活动的支持将有助于在波多黎各大学-马亚圭斯设立电气工程博士课程,从而促进和增加少数民族对工程研究的参与。
英文摘要
BRIGE: Development of Self-Programmable CMOS Analog Circuits and SystemsToday's stringent low-power requirements, along with the reduced signal swing, present a non-trivial problem for analog circuit designers. Additionally, the increasing device mismatch, do to technology scaling, have forced designers to look for alternate design approaches. Programmable/reconfigurable electronics, used in the analog domain, have recently emerged as a viable solution for these problems. Intellectual Merit: The proposed research aims to advance the state of the art in analog circuit design through the development of self-programmable analog memory elements. The main effort of this work will center on developing a circuit infrastructure that will allow for automated programming of reconfigurable circuits. The proposed architecture seeks to abstract the programming issues from the designer, thus greatly simplifying the use of these devices. The developed self-programmable architecture will lay the foundation needed for developing novel high-performance programmable/reconfigurable circuits and systems by taking care of the programming issues involved with floating-gate transistors. Additionally, this work will use the developed architecture as a new tool to design novel high-performance analog circuits. The proposed self-programmable memory will also be incorporated in the design of large-scale field-programmable arrays, thus enabling faster programming cycles. The intellectual merit of this research includes the design and development of: 1) an on-chip self-programmable circuit infrastructure for analog memories and reconfigurable systems, 2) a programmable temperature insensitive voltage/current reference, 3) a programmable low-dropout voltage regulator, and 4) a large-scale field-programmable analog array for fast programming cycles.Broader Impacts: The proposed research effort will have broad impact by developing a core architecture for self-programmable reconfigurable circuits and systems that will be widely used by circuit designers in the analog community. The developed architecture will become a new tool that will allow designers to overcome the research challenges present in today's technology. From an educational perspective, the proposed work will provide research experience to senior undergraduate and graduate students, at the University of Puerto Rico - Mayagüez, in the design, fabrication, and testing of microelectronic devices. This experience will definitely complement their academic preparation, allowing for the training of the next generation of Hispanic professionals in the area of integrated circuit design. In addition, the support of the research and educational activities outlined in this proposal will help the establishment of the Electrical Engineering doctoral program at the University of Puerto Rico - Mayagüez, thus promoting and increasing minority participation in engineering research.
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  • 批准号:
    --
  • 项目类别:
    --
  • 资助金额:
    40万元
  • 批准年份:
    2020
  • 负责人:
    Vikrant Gupta
  • 依托单位: