Collaborative Research:II-NEW: A Digital/VLSI Test and Reliable Computing Research Laboratory
合作研究:II-NEW:数字/VLSI测试和可靠计算研究实验室
基本信息
- 批准号:0958298
- 负责人:
- 金额:$ 15.17万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2010
- 资助国家:美国
- 起止时间:2010-06-01 至 2014-05-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Testing represents one of the major manufacturing costs in the semiconductor industry. Designing circuits with testability features significantly reduces testing costs and time. Thus, it is important for designers to be exposed to the concepts in testing which can help them design better and reliable products.In this collaborative project between the University of Toledo (UT) and Ohio Northern University (ONU), a "Digital/VLSI Test and Reliable Computing Research Laboratory" is being established for the development of computationally intensive algorithms and use of commercial CAD tools for testing digital, VLSI, and advanced semiconductor devices.Some of the research projects being carried out include: Novel Testing Techniques for Quantum Cellular Automata (QCA) circuits; Built In Self Test (BIST) for Embedded SRAMS in System on Chips; Testing Look-Up-Table (LUT) Delay Aliasing Faults in SRAM Based FPGAs Using Half-Frequencies; Analysis and Testing of Electromigration Failures; Testing and Modeling Soft Errors in FPGAs; Reliability Analysis and Device Failures in Advanced Semiconductor Devices; Reliability Issues Related to Power Consumption in VLSI Chips during Test; and Small Delay Defects and Test Generation.Educational modules developed from the research carried out in this project are integrated into a number of graduate and undergraduate courses at ONU and UT. Since applications of semiconductor chips are far and wide, many different industries including auto, aerospace, defense and healthcare may benefit from this project.
测试是半导体行业的主要制造成本之一。设计具有可测试性的电路可以显著降低测试成本和时间。因此,设计师接触测试中的概念是很重要的,这可以帮助他们设计出更好、更可靠的产品。在托莱多大学(UT)和俄亥俄北方大学(ONU)之间的这个合作项目中,正在建立一个“数字/超大规模集成电路测试和可靠计算研究实验室”,用于开发计算密集型算法和使用商业CAD工具来测试数字、超大规模集成电路和先进的半导体设备。正在进行的一些研究项目包括:量子元胞自动机(QCA)电路的新型测试技术;片上系统嵌入式sram的内建自检基于半频率的SRAM fpga查找表延迟混叠故障测试电迁移故障的分析与测试fpga软误差的测试与建模先进半导体器件可靠性分析与器件失效VLSI芯片测试过程中功耗相关的可靠性问题小延迟缺陷及测试生成。从该项目中开展的研究中开发的教育模块被整合到ONU和UT的许多研究生和本科课程中。由于半导体芯片的应用范围广泛,包括汽车、航空航天、国防和医疗保健在内的许多不同行业都可能从这个项目中受益。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Mohammed Niamat其他文献
A Zero Trust-Based Framework Employing Blockchain Technology and Ring Oscillator Physical Unclonable Functions for Security of Field Programmable Gate Array Supply Chain
采用区块链技术和环形振荡器物理不可克隆功能的零信任框架,确保现场可编程门阵列供应链的安全
- DOI:
- 发表时间:
2024 - 期刊:
- 影响因子:3.9
- 作者:
Akshay Kulkarni;Noor Ahmad Hazari;Mohammed Niamat - 通讯作者:
Mohammed Niamat
Mohammed Niamat的其他文献
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{{ truncateString('Mohammed Niamat', 18)}}的其他基金
I-Corps: Novel Smart Meters with Built-in Self-Test and Hardware Security
I-Corps:具有内置自检和硬件安全功能的新型智能电表
- 批准号:
1646723 - 财政年份:2016
- 资助金额:
$ 15.17万 - 项目类别:
Standard Grant
Digital Design Laboratory Equipment
数字化设计实验室设备
- 批准号:
9551873 - 财政年份:1995
- 资助金额:
$ 15.17万 - 项目类别:
Fellowship Award
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