Collaborative Research: DESC: Type II: REFRESH: Revisiting Expanding FPGA Real-estate for Environmentally Sustainability Heterogeneous-Systems
合作研究:DESC:类型 II:REFRESH:重新审视扩展 FPGA 空间以实现环境可持续性异构系统
基本信息
- 批准号:2324865
- 负责人:
- 金额:$ 50万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2023
- 资助国家:美国
- 起止时间:2023-10-01 至 2027-09-30
- 项目状态:未结题
- 来源:
- 关键词:
项目摘要
Computing systems can exert substantial environmental impacts across their entire life cycles, encompassing manufacturing, usage, and end-of-life disposal. For example, manufacturing processes often require significant amounts of energy and produce substantial carbon emissions. When computers reach the end of their life, they become electronic waste (e-waste). E-waste, if not properly managed, can pose risks to human health and the environment due to the presence of hazardous materials. Mitigating these impacts is a significant challenge for sustainable computing. This project introduces innovative approaches to minimize the environmental impact of computing systems by recycling decommissioned chips, integrating them to extend their lifespans, and achieving near state-of-the-art performance with the newly integrated chips. The project will be carried out by a team of investigators from the University of Pittsburgh and the University of Notre Dame. The project's impacts are twofold: significantly reducing carbon emissions from manufacturing and mitigating environmental risks associated with e-waste by keeping these toxic, non-biodegradable devices out of landfills. This project is making valuable contributions to society through education and outreach activities designed to engage K-12 students with an interest in environmental science, biology, and artificial intelligence (AI).The primary goal of this project is to achieve sustainable computing by reusing recently retired field-programmable gate array (FPGA) chips to build REFRESH FPGA devices and employing 2.5-dimensional (2.5D) integration with an underlying interposer for interconnection. This approach aims to significantly reduce carbon emissions incurred from the fabrication process of new chips. The project consists of four research thrusts. Thrust 1 focuses on developing REFRESH FPGA architecture and design automation toolflow, tailored to address the challenge of targeting hardware designs onto non-monolithic FPGAs. Thrust 2 investigates REFRESH FPGA hardware analysis and prototyping through a design automation framework capable of automatically selecting the optimal design configuration including inter-chip connection topology, connection bandwidth, and the selection of FPGA chips based on their aging condition. Thrust 3 is dedicated to developing a system-in-a-package sustainability analysis, validation, and optimization process, aiming to accurately model and assess the environmental impacts stemming from the 2.5D integrated REFRESH FPGAs including fabrication, integration, and packaging. Thrust 4 extensively explores the most effective methodologies for accelerating a wide range of applications from machine learning to genomics.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
计算系统可以在其整个生命周期中对环境产生重大影响,包括制造、使用和报废处置。例如,制造过程通常需要大量的能源,并产生大量的碳排放。当计算机的寿命到尽头时,它们就变成了电子垃圾(电子垃圾)。电子垃圾如果管理不当,由于存在危险材料,可能会对人类健康和环境构成风险。减轻这些影响是可持续计算面临的重大挑战。该项目引入了创新的方法,通过回收退役芯片,将其整合以延长其使用寿命,并通过新整合的芯片实现接近最先进的性能,从而将计算系统对环境的影响降至最低。该项目将由匹兹堡大学和圣母大学的一组研究人员进行。该项目的影响有两个:显著减少制造业的碳排放,并通过使这些有毒、不可生物降解的设备远离垃圾填埋场来缓解与电子垃圾相关的环境风险。该项目通过旨在吸引对环境科学、生物学和人工智能(AI)感兴趣的K-12学生的教育和推广活动为社会做出宝贵贡献。该项目的主要目标是通过重复使用最近退役的现场可编程门阵列(FPGA)芯片来构建更新的FPGA设备,并采用2.5维(2.5D)集成和底层插入器进行互联,从而实现可持续计算。这种方法旨在显著减少新芯片制造过程中产生的碳排放。该项目由四个研究项目组成。SPECT 1专注于开发更新的现场可编程门阵列架构和设计自动化工具流,旨在应对将硬件设计定位于非单片现场可编程门阵列的挑战。推力2通过设计自动化框架研究更新的FPGA硬件分析和原型,该框架能够自动选择最优的设计配置,包括芯片间连接拓扑、连接带宽和基于老化条件的FPGA芯片选择。Struts 3致力于开发封装系统可持续性分析、验证和优化流程,旨在准确建模和评估2.5D集成更新现场可编程门阵列(包括制造、集成和封装)所产生的环境影响。推力4广泛探索了加速从机器学习到基因组的广泛应用的最有效方法。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(0)
专著数量(0)
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会议论文数量(0)
专利数量(0)
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Yiyu Shi其他文献
DLBC: A Deep Learning-Based Consensus in Blockchains for Deep Learning Services
DLBC:深度学习服务区块链中基于深度学习的共识
- DOI:
- 发表时间:
2019 - 期刊:
- 影响因子:0
- 作者:
Boyang Li;Changhao Chenli;Xiaowei Xu;Yiyu Shi;Taeho Jung - 通讯作者:
Taeho Jung
Optimizing sequential diagnostic strategy for large-scale engineering systems using a quantum-inspired genetic algorithm: A comparative study [J]. , 2019(12). (SCI)
使用量子启发遗传算法优化大型工程系统的顺序诊断策略:比较研究[J]。
- DOI:
- 发表时间:
2019 - 期刊:
- 影响因子:8.7
- 作者:
Jinsong Yu;Yiyu Shi;Diyin Tang;Hao Liu;Limei Tian - 通讯作者:
Limei Tian
HS3-DPG: Hierarchical Simulation for 3-D P/G Network
HS3-DPG:3-D P/G 网络的分层仿真
- DOI:
10.1109/tvlsi.2014.2358582 - 发表时间:
2015-10 - 期刊:
- 影响因子:0
- 作者:
Yu Wang;Song Yao;Shuai Tao;Xiaoming Chen;Yuchun Ma;Yiyu Shi;Huazhong Yang - 通讯作者:
Huazhong Yang
Combating Data Leakage Trojans in Commercial and ASIC Applications With Time-Division Multiplexing and Random Encoding
利用时分复用和随机编码对抗商业和 ASIC 应用中的数据泄露木马
- DOI:
- 发表时间:
2018 - 期刊:
- 影响因子:2.8
- 作者:
Travis E. Schulze;D. Beetner;Yiyu Shi;K. Kwiat;Charles A. Kamhoua - 通讯作者:
Charles A. Kamhoua
Optimal selected phasor measurement units for identifying multiple line outages in smart grid
用于识别智能电网中多条线路停电的最佳选择相量测量单元
- DOI:
10.1109/isgt.2015.7131850 - 发表时间:
2015 - 期刊:
- 影响因子:0
- 作者:
Jie Wu;Jinjun Xiong;Prasenjit Shil;Yiyu Shi - 通讯作者:
Yiyu Shi
Yiyu Shi的其他文献
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{{ truncateString('Yiyu Shi', 18)}}的其他基金
FuSe-TG: Cross-layer Co-Design for Self-Evolving Implantable Devices
FuSe-TG:自我进化植入设备的跨层协同设计
- 批准号:
2235364 - 财政年份:2023
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
IRES Track I: International Research Experience for Students on Artificial Intelligence for Congenital Heart Diseases
IRES Track I:先天性心脏病人工智能学生国际研究经验
- 批准号:
2106416 - 财政年份:2021
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
Collaborative Research: CNS Core: Small: Towards Unsupervised Learning on Resource Constrained Edge Devices with Novel Statistical Contrastive Learning Scheme
合作研究:CNS 核心:小型:利用新颖的统计对比学习方案在资源受限的边缘设备上实现无监督学习
- 批准号:
2122220 - 财政年份:2021
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
RAPID: Collaborative Research: Independent Component Analysis Inspired Statistical Neural Networks for 3D CT Scan Based Edge Screening of COVID-19
RAPID:协作研究:独立成分分析启发的统计神经网络,用于基于 3D CT 扫描的 COVID-19 边缘筛查
- 批准号:
2027539 - 财政年份:2020
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
Collaborative Research: CNS Core: Small: Intermittent and Incremental Inference with Statistical Neural Network for Energy-Harvesting Powered Devices
合作研究:CNS 核心:小型:利用统计神经网络对能量收集供电设备进行间歇和增量推理
- 批准号:
2007302 - 财政年份:2020
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
SPX: Collaborative Research: Scalable Neural Network Paradigms to Address Variability in Emerging Device based Platforms for Large Scale Neuromorphic Computing
SPX:协作研究:可扩展神经网络范式,以解决基于新兴设备的大规模神经形态计算平台的可变性
- 批准号:
1919167 - 财政年份:2019
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
Phase 1 IUCRC University of Notre Dame: Center for Alternative Sustainable and Intelligent Computing (ASIC)
第一阶段 IUCRC 圣母大学:替代可持续和智能计算中心 (ASIC)
- 批准号:
1822099 - 财政年份:2018
- 资助金额:
$ 50万 - 项目类别:
Continuing Grant
University of Notre Dame Planning Grant: I/UCRC for Alternative Sustainable and Intelligent Computing (ASIC)
圣母大学规划补助金:I/UCRC 替代可持续和智能计算 (ASIC)
- 批准号:
1650473 - 财政年份:2017
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
IRES: International Research Experience for Students on Design Automation of Three-Dimensional Integrated Circuits
IRES:三维集成电路设计自动化学生国际研究经验
- 批准号:
1456867 - 财政年份:2015
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
IRES: International Research Experience for Students on Design Automation of Three-Dimensional Integrated Circuits
IRES:三维集成电路设计自动化学生国际研究经验
- 批准号:
1559029 - 财政年份:2015
- 资助金额:
$ 50万 - 项目类别:
Standard Grant
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Research on Quantum Field Theory without a Lagrangian Description
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