CAREER: Enhancing Quality through Probabilistic On-Chip Test

职业:通过概率片上测试提高质量

基本信息

  • 批准号:
    1061164
  • 负责人:
  • 金额:
    $ 40万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Continuing Grant
  • 财政年份:
    2010
  • 资助国家:
    美国
  • 起止时间:
    2010-06-01 至 2017-12-31
  • 项目状态:
    已结题

项目摘要

Future integrated circuits will contain tens, hundreds, or possibly even a thousand cores per chip. However, the scaling techniques that will make this possible also make the underlying circuit fabric less reliable-leading to increased wearout and defects that cannot be detected at manufacturing. In response, the PI proposes fundamental research for generating new test sets on-chip to identify failing cores. The tests will be created "on-the-fly" and dynamically targeted to the most critical areas of a core. Some key portions of the proposed research involve the creation and verification of hardware monitors for determining which faults are most important for the user's applications, the diagnostic use of online error detection hardware to pinpoint locations that caused previous failures, and the analysis and development of protocols to efficiently create and transport tests in a network-on-chip environment.The great performance advantages of future multi-core devices will remain unrealized if the reliability of those devices cannot be trusted. The proposed research investigates critical tools for promoting that reliability. The integrated education plan provides research opportunities for students at multiple levels?from high school to graduate school?including students from underrepresented groups. In addition to recruiting undergraduates from Brown, the PI plans to work with the CRA-W DREU (Distributed Research Experiences for Undergraduates) program to host visiting female undergraduates for summer research. The PI will also recruit high school students from the Providence Public Schools, many of whom are members of underrepresented groups, for summer research through the Brown GK-12 program.
未来的集成电路每个芯片将包含数十个、数百个甚至可能上千个核心。 然而,使这成为可能的缩放技术也使底层电路结构不太可靠,导致增加的磨损和在制造时无法检测到的缺陷。 作为回应,PI提出了在片上生成新测试集以识别故障内核的基础研究。 这些测试将被“即时”创建,并动态地针对核心的最关键区域。 拟议研究的一些关键部分涉及硬件监视器的创建和验证,以确定哪些故障对用户的应用程序最重要,在线错误检测硬件的诊断使用,以查明导致先前故障的位置,以及协议的分析和开发,以在片上网络环境中有效地创建和传输测试。未来多芯片的巨大性能优势,如果核心设备的可靠性不能被信任,则这些设备将仍然无法实现。 拟议的研究调查的关键工具,以促进这种可靠性。 综合教育计划为多层次的学生提供研究机会?从高中到研究生院包括来自代表性不足群体的学生。 除了从布朗大学招收本科生外,PI还计划与CRA-W DREU(本科生分布式研究经验)计划合作,接待来访的女本科生进行夏季研究。 PI还将招募来自普罗维登斯公立学校的高中生,其中许多人是代表性不足的群体的成员,通过布朗GK-12计划进行夏季研究。

项目成果

期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)

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Jennifer Dworak其他文献

Dual Use Circuitry for Early Failure Warning and Test
用于早期故障警告和测试的双用电路
One more time! Increasing fault detection with scan shift capture
再一次!
  • DOI:
  • 发表时间:
    2018
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Hui Jiang;Fanchen Zhang;Yi Sun;Jennifer Dworak
  • 通讯作者:
    Jennifer Dworak
Direct Reed-Muller Transform of Digital Logic Netlists
数字逻辑网表的直接 Reed-Muller 变换
  • DOI:
  • 发表时间:
    2011
  • 期刊:
  • 影响因子:
    0
  • 作者:
    M. Thornton;Jennifer Dworak
  • 通讯作者:
    Jennifer Dworak
Putting wasted clock cycles to use: Enhancing fortuitous cell-aware fault detection with scan shift capture
利用浪费的时钟周期:通过扫描移位捕获增强偶然单元感知故障检测
  • DOI:
    10.1109/test.2016.7805828
  • 发表时间:
    2016
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Fanchen Zhang;D. Hwong;Yi Sun;Allison Garcia;Soha Alhelaly;G. Shofner;L. Winemberg;Jennifer Dworak
  • 通讯作者:
    Jennifer Dworak
When Optimized N-Detect Test Sets are Biased: An Investigation of Cell-Aware-Type Faults and N-Detect Stuck-At ATPG
当优化的 N-Detect 测试集出现偏差时:细胞感知型故障和 N-Detect 卡在 ATPG 的调查
  • DOI:
  • 发表时间:
    2014
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Fanchen Zhang;Micah Thornton;Jennifer Dworak
  • 通讯作者:
    Jennifer Dworak

Jennifer Dworak的其他文献

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{{ truncateString('Jennifer Dworak', 18)}}的其他基金

SHF: Small: Collaborative Research: Harvesting Wasted Time and Existing Circuitry for Efficient Field Testing
SHF:小型:协作研究:利用浪费的时间和现有电路进行高效的现场测试
  • 批准号:
    1814928
  • 财政年份:
    2018
  • 资助金额:
    $ 40万
  • 项目类别:
    Standard Grant
SHF: Small: Collaborative Research: Using Identified Circuit Invariance for Online error Detection
SHF:小型:协作研究:使用已识别的电路不变性进行在线错误检测
  • 批准号:
    1110290
  • 财政年份:
    2010
  • 资助金额:
    $ 40万
  • 项目类别:
    Standard Grant
CAREER: Enhancing Quality through Probabilistic On-Chip Test
职业:通过概率片上测试提高质量
  • 批准号:
    0952950
  • 财政年份:
    2010
  • 资助金额:
    $ 40万
  • 项目类别:
    Continuing Grant
SHF: Small: Collaborative Research: Using Identified Circuit Invariance for Online error Detection
SHF:小型:协作研究:使用已识别的电路不变性进行在线错误检测
  • 批准号:
    0915302
  • 财政年份:
    2009
  • 资助金额:
    $ 40万
  • 项目类别:
    Standard Grant

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