CAREER: Architectural Support for CPU / GPU Hybridization

处理器行业目前面临的一个基本挑战是，在能源和程序员效率都受到限制的情况下，如何继续满足性能和可伸缩性需求。CAREER项目以最近推出的融合设计为基础，将传统微处理器和图形处理器集成在同一个封装中，旨在通过开发更具可编程性、灵活性、可扩展性和安全性的混合架构来应对这些挑战。为了实现这一长期目标，该项目研究了最小化传统协同处理模型限制的技术，包括性能瓶颈、易受攻击的共享内存空间和不灵活的资源管理。具体来说，这个项目探讨了复杂的控制流和内存访问引起的线程分歧，内核之间的线程迁移，超越传统图形处理任务的硬件加速器设计，以及增加安全保障以匹配当前在传统微处理器上可用的内容。此外，本项目还研究了各种指令集扩展、加速器体系结构和计算模型，这些都有可能显著提高效率和程序员的灵活性。预期的影响是，这个CAREER项目有一天将以计算行业的另一个新领域的形式结出果实，这个领域专门研究混合架构，可以扩展到数千个独立线程，同时保持传统的多用户操作系统和中间件的功能。从广义上讲，通过推进计算机体系结构的最新技术，这项研究将导致消费者设备在尺寸和外形因素、能源效率和电池寿命、支持应用程序的复杂性和图形保真度方面的改进。同样，使用这些架构来实现持续的性能扩展，通过利用高性能计算来实现创新发现的领域（例如生物信息学、气候建模、商业智能）的进步，有可能产生广泛的社会影响。该项目还包括重点扩展PI开发的现有课程，该课程从硬件设计的角度引入图形处理和架构的新方法。

One of the fundamental challenges facing the processor industry today is in continuing to address performance and scalability demands given the constraints of both energy and programmer efficiency. This CAREER project builds upon recently-introduced fused designs, which incorporate conventional microprocessors and graphics processors in the same package, in order to address these challenges through the development of more programmable, flexible, scalable, and secure hybrid architectures. Towards this long-term goal, this project investigates techniques that minimize limitations of the traditional coprocessing model, including performance bottlenecks, vulnerable shared memory spaces, and inflexible resource management. Specifically, this project explores thread divergence caused by complex control-flow and memory access, thread migration between cores, hardware accelerator design for tasks beyond traditional graphics processing, and adding security safeguards to match what is currently available on conventional microprocessors. In addition, this project also examines a variety of instruction set extensions, accelerator architectures, and models of computation that have the potential to lead to significant efficiency and programmer flexibility improvements. The expected impact is that this CAREER project will one day bear fruit in the form of another new segment of the computing industry, one that specializes in hybrid architectures that can scale to thousands of independent threads, while maintaining the capabilities of a traditional multi-user operating system and middleware. Broadly speaking, by advancing the state-of-the-art in computer architecture, this research will lead to improvements in consumer devices in terms of size and form factor, energy efficiency and battery life, and complexity and graphical fidelity of supported applications. Similarly, the usage of these architectures to enable continued performance scaling has the potential to have wide-ranging societal impact, through the advancement of those fields (e.g. bioinformatics, climate modeling, business intelligence) that utilize high-performance computing to enable innovative discovery. This project also includes a focus on expanding an existing course that the PI has developed, that takes a novel approach in introducing graphics processing and architecture from a hardware design perspective.