CAREER: Design and Implementation of an Evolving Intelligent Wideband Digital Receiver System on a Tribrid Computing Platform Capable of Cognitive Learning

ECCS-1150507Kiran George，加利福尼亚州立大学-Fullerton CAREER：在能够认知学习的三元计算平台上设计和实现不断发展的智能宽带数字接收器系统智能优点：现代雷达接收器的基本功能是截获射频信号，以识别和定位其来源。由于缺乏对感兴趣的波形、大量信号以及与信号占据相同频谱的噪声能量的先验知识，使得现代宽带接收器的设计成为一项艰巨的任务。这项工作的目标是设计和实现一种智能宽带数字接收器，能够通过确定信号的合法性，同时基于信号环境、属性和线索对输入信号进行分类和跟踪，并通过在场内和场外操作中的认知学习来增强其知识库，并通过三种记忆来强烈增强其知识库：内在记忆、语义记忆和最重要的情节记忆。该设计将利用三元硬件架构，将计算强度智能地划分并在三个商用现成处理器系统之间进行处理：加速处理单元、多核平铺处理器和以硅光子技术为高速背板的现场可编程门阵列，以增强芯片到芯片的数据通信，减少处理器的数据饥饿。广泛影响：拟议的研究成果可应用于广泛的领域，如无线通信系统、生物医学信号处理和其他使用基于快速傅立叶变换的谱估计的应用。建议的学习系统设计将在两个不同的硬件形式因素中实现，这将作为研究人员将建议的认知学习模型纳入其具体应用的起点。同样，所提出的定制硅光子接口卡设计可以被工程师用来提高实时系统中数据采集卡和处理器之间的数据传输速率。这项拟议的研究将通过研究生研究计划、本科生学徒计划、午餐演讲系列和本科生暑期研究计划，为加州州立大学、富勒顿大学(CSUF)、莱特州立大学和赛普拉斯学院(CC)创造教育和研究机会。计划的教育活动包括将研究成果纳入工程课程和引入专业轨道。计划开展具体的外联工作，以揭露CSUF、CC和当地高中的代表不足和少数族裔学生。成果将通过国际会议、期刊、CSUF网站和校园活动向学术界和工业界广泛传播。

ECCS-1150507Kiran George, California State University-FullertonCAREER: Design and Implementation of an Evolving Intelligent Wideband Digital Receiver System on a Tribrid Computing Platform Capable of Cognitive LearningIntellectual Merit: The fundamental function of a modern radar receiver is to intercept radio frequency signals to identify and locate its source. Lack of a priori knowledge of the waveform of interest, multitude of signals and the noise energy that occupies the same frequency spectrum as the signal, makes the design of a modern wideband receiver a daunting task. The objective of this effort is to design and implement an intelligent wideband digital receiver capable of achieving a near-zero false alarm rate ( 10-6) and a high instantaneous dynamic range by ascertaining the legitimacy of signals while categorizing and tracking incoming signals based on the signal environment, attributes and cues, and simultaneously enhancing its knowledge base through cognitive learning during both in-field and off-field operations, strongly augmented by three kinds of memory: intrinsic, semantic, and most importantly episodic. The design will utilize a tribrid hardware architecture where the computational intensity is intelligently partitioned and handled between three commercially available off-the-shelf processor systems: accelerated processing unit, many-core TILE processor, and field-programmable gate array with silicon photonic technology as the high-speed backplane to enhance chip-to-chip data communications and reduce data starvation of the processors.Broader Impacts: Outcomes of the proposed research can be applied to a broad range of areas such as wireless communication systems, biomedical signal processing, and other applications that utilize fast Fourier transform based spectral estimation. The proposed learning system design will be realized in two distinct hardware form factors which will serve as a starting point for researchers to incorporate the proposed cognitive learning model into their specific applications. Likewise, the proposed customized silicon photonic interface card design can be utilized by engineers to improve the data transfer rate between data acquisition card and processors in real-time systems. The proposed research will generate both educational and research opportunities at California State University, Fullerton (CSUF), Wright State University and Cypress College (CC) through graduate research program, undergraduate apprentice program, lunch speaker series, and undergraduate summer research program. Planned educational activities include the integration of research findings into engineering courses and the introduction of a specialty track. Concrete outreach efforts to expose the underrepresented and minority students at CSUF, CC and local high schools are planned. Outcomes will be widely disseminated to academic and industrial communities through international conferences, journals, CSUF website, and at on-campus events.