CAREER: Design and Implementation of an Evolving Intelligent Wideband Digital Receiver System on a Tribrid Computing Platform Capable of Cognitive Learning

kiran George， California State University-FullertonCAREER：在具有认知学习能力的混合计算平台上设计和实现一种不断发展的智能宽带数字接收机系统智力优势：现代雷达接收机的基本功能是拦截射频信号，以识别和定位其来源。缺乏对感兴趣的波形的先验知识，大量的信号以及与信号占用相同频谱的噪声能量，使得现代宽带接收器的设计成为一项艰巨的任务。这项工作的目标是设计和实现一种智能宽带数字接收机，能够通过确定信号的合法性，同时根据信号环境、属性和线索对传入信号进行分类和跟踪，并同时通过在现场和场外操作期间的认知学习来增强其知识库，从而实现接近零的误报率（10-6）和高瞬时动态范围。被三种记忆强化：内在记忆，语义记忆，最重要的是情景记忆。该设计将利用三种混合硬件架构，其中计算强度在三种商用现成处理器系统之间进行智能分区和处理：加速处理单元、多核TILE处理器和现场可编程门阵列，该阵列采用硅光子技术作为高速背板，以增强芯片间的数据通信并减少处理器的数据饥饿。更广泛的影响：提出的研究结果可以应用于广泛的领域，如无线通信系统，生物医学信号处理和其他利用基于快速傅立叶变换的频谱估计的应用。提出的学习系统设计将在两种不同的硬件形式因素中实现，这将作为研究人员将提出的认知学习模型纳入其具体应用的起点。同样，所提出的定制硅光子接口卡设计可以被工程师用来提高实时系统中数据采集卡与处理器之间的数据传输率。拟议的研究将通过研究生研究计划、本科生学徒计划、午餐演讲系列和本科生暑期研究计划，在加州州立大学、富勒顿（CSUF）、赖特州立大学和赛普拉斯学院（CC）产生教育和研究机会。计划的教育活动包括将研究成果整合到工程课程中，并引入专业课程。计划开展具体的外展工作，以了解CSUF， CC和当地高中中代表性不足的少数民族学生。研究成果将通过国际会议、期刊、CSUF网站和校园活动广泛传播给学术界和工业界。

ECCS-1150507Kiran George, California State University-FullertonCAREER: Design and Implementation of an Evolving Intelligent Wideband Digital Receiver System on a Tribrid Computing Platform Capable of Cognitive LearningIntellectual Merit: The fundamental function of a modern radar receiver is to intercept radio frequency signals to identify and locate its source. Lack of a priori knowledge of the waveform of interest, multitude of signals and the noise energy that occupies the same frequency spectrum as the signal, makes the design of a modern wideband receiver a daunting task. The objective of this effort is to design and implement an intelligent wideband digital receiver capable of achieving a near-zero false alarm rate ( 10-6) and a high instantaneous dynamic range by ascertaining the legitimacy of signals while categorizing and tracking incoming signals based on the signal environment, attributes and cues, and simultaneously enhancing its knowledge base through cognitive learning during both in-field and off-field operations, strongly augmented by three kinds of memory: intrinsic, semantic, and most importantly episodic. The design will utilize a tribrid hardware architecture where the computational intensity is intelligently partitioned and handled between three commercially available off-the-shelf processor systems: accelerated processing unit, many-core TILE processor, and field-programmable gate array with silicon photonic technology as the high-speed backplane to enhance chip-to-chip data communications and reduce data starvation of the processors.Broader Impacts: Outcomes of the proposed research can be applied to a broad range of areas such as wireless communication systems, biomedical signal processing, and other applications that utilize fast Fourier transform based spectral estimation. The proposed learning system design will be realized in two distinct hardware form factors which will serve as a starting point for researchers to incorporate the proposed cognitive learning model into their specific applications. Likewise, the proposed customized silicon photonic interface card design can be utilized by engineers to improve the data transfer rate between data acquisition card and processors in real-time systems. The proposed research will generate both educational and research opportunities at California State University, Fullerton (CSUF), Wright State University and Cypress College (CC) through graduate research program, undergraduate apprentice program, lunch speaker series, and undergraduate summer research program. Planned educational activities include the integration of research findings into engineering courses and the introduction of a specialty track. Concrete outreach efforts to expose the underrepresented and minority students at CSUF, CC and local high schools are planned. Outcomes will be widely disseminated to academic and industrial communities through international conferences, journals, CSUF website, and at on-campus events.