SBIR Phase I: Fast Slewing Voltage Regulator for Package Integrated Dynamic Voltage and Frequency Scaling Applications
SBIR Phase I: Fast Slewing Voltage Regulator for Package Integrated Dynamic Voltage and Frequency Scaling Applications
批准号:
1448293
负责人:
David Tournatory
金额:
$15.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2015
资助国家:
美国
项目状态:
已结题
起止时间:
2015-01-01 至 2015-12-31
中文摘要
这个小型企业创新研究第一阶段项目的更广泛的影响/商业潜力将是大幅降低功耗和显著减少电压调节器占地面积,同时仍然部署标准的CMOS半导体工艺。该项目将开发将引领封装内电压调节器的商业趋势的产品,并将增加美国半导体行业的竞争力。更小的尺寸和成本,以及将芯片放置在封装中的能力,使各种系统组件能够拥有自己的电压调节器,由于转换速度更快,因此设备能够托管大数据和其他高级应用所需的日益复杂的应用。此外,在数据中心使用根据该项目开发的技术将转化为更节能的电子基础设施,从而减少对国家二氧化碳排放及其对气候和环境的影响。该小型企业创新研究第一阶段项目寻求开发基于该公司新型专有体系结构的封装内电压调节器,该体系结构将显著降低功耗,显著减少电压调节器占地面积,并提高转换速率,同时仍保持在标准CMOS工艺的范围内。在过去的40年里,降压式DC-to-DC电压调节器(VR)一直用于转换线路或电池供电的直流电压,为这些系统IC提供电源。IC制造商已经将这些VR的效率优化到饱和。为了实现系统效率的下一步功能,必须使用新的方法来改善SoC本身的功耗,以平衡所需功率和提供的功率。与此同时,工业和消费市场上都有一种永不满足的愿望,那就是减少这些电子产品的数量。该公司的集成电压调节器技术将通过大幅降低其负载:系统IC的功耗来应对这些挑战。其新的调制器架构的开关频率比目前的降压型VRS快数量级,这也将显著减小电压调节器的尺寸,从而减少系统占地面积,同时保持与大容量IC工艺的经济竞争力。
英文摘要
The broader impact/commercial potential of this Small Business Innovation Research Phase I project will be to dramatically decrease power consumption and significantly reduce the voltage regulator footprint while still deploying standard CMOS semiconductor processes. This project will develop products that will lead the commercial trend toward in-package voltage regulators, and will increase the competitiveness of the U.S. semiconductor industry. The reduced size and cost, and the ability for the chip to be placed in the package, enables the various system components to have their own voltage regulator, which, due to the faster slew rate, results in the ability for devices to host the increasingly sophisticated applications necessary for big data and other advanced applications. In addition, the use of the technology developed under this project in data centers will translate to more energy-efficient electronic infrastructure that contributes less to the nation's CO2 emissions and their impact on climate and the environment.This Small Business Innovation Research Phase I project seeks to develop an in-package voltage regulator based on the company's novel proprietary architecture that will dramatically decrease power consumption, significantly reduce the voltage regulator footprint, and increase slew rates, while still remaining within the circle of standard CMOS processes. For the last 40 years the buck DC-to-DC voltage regulator (VR) has been used to convert line- or battery-powered DC voltages to supply these System ICs. IC makers have optimized the efficiency of these VRs to saturation. To achieve the next step function in system efficiency, the power dissipation in the SoC itself must be improved with new methodologies to balance needed versus delivered power. Meanwhile there is an insatiable desire to reduce the volume of these electronic products both in industry and consumer markets. The company's integrated voltage regulator technology will address these challenges by dramatically decreasing power consumption at its load: the system IC. Its new modulator architecture with switching frequencies orders of magnitude faster than today's buck VRs will also significantly reduce the size of the voltage regulator and thus system footprint while remaining economically competitive with high volume IC processes.
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