SBIR Phase I: The Quantum FinFET Innovation to Extend Moore's Law: in silico proof-of-concept and performance validation

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The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is to address current technology bottlenecks that are slowing advances in semiconductor manufacturing as conventional planar and advanced (FinFET) transistor technologies reach physical limits for scalability. This project seeks to continue Moore's Law and advances the Silicon metal oxide semiconductor field-effect transistor development using a new device architecture. This design may enable more power-efficient electronics to advance high performance computing, computer memory, mobile electronics, and the emerging Internet-Of-Things applications. This Small Business Innovation Research (SBIR) Phase I project will provide successful validation of a new metal oxide semiconductor field-effect transistor (MOSFET) device and manufacturing process can provide a cost-effective proof-of-concept of the underlying device physics. The general challenge in developing nanoscale MOSFETs is that device sizes are comparable to some critical quantum physics material parameters and the channel length is approaching the mean free path of carriers in silicon. This work seeks to validate the devices using Technology Computer Aided Design (TCAD) modeling and simulation tools. Design-of-experiments tables will also be developed to create effective test structures for fabrication in follow-on work. Two-dimensional quantum screening and other critical phenomena not properly modeled in TCAD will be corrected using theoretical methods and experimental data from related research. This project seeks to provide the scientific basis for optimal, manufacturable three-dimensional nanoelectronic devices and characterization of the quantum effects that dominate their operation in the ballistic regime. Phase I will prove/validate device and processing concepts to motivate the fabrication and characterization of devices and test structures.