SBIR Phase I: Efficient Custom Platforms for Smart Computer Vision in the Internet of Things

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The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project will result in a significant improvement in the performance, power, and cost of deploying smart computer vision applications. This improvement will simplify the deployment of smart vision applications in automotive, sports and entertainment, consumer, robotics and machine vision, medical, and security/surveillance domains. Through a unique and energy-efficient hardware computation platform, automated hardware design for machine learning applications, and efficient implementation libraries, this project will improve both the feature set and efficiency of smart vision applications across a wide range of end-use cases. With the rapid growth in smart vision applications, this project will be a key enabling technology to support high-performance, energy efficient and scalable solutions. Internet of Things (IoT) applications promise to produce billions in revenue and trillions in global economic impact through improved efficiency, safety, energy, and labor costs. Wide deployment of customized computing in IoT applications will lead to substantial energy savings, and a corresponding reduction in carbon emissions, and a more sustainable growth model for deployment of intelligent sensor systems with thousands or millions of sensor nodes analyzing large volumes of input data.The proposed project focuses on the design of high performance, energy-efficient IoT computer vision platforms, design tools, and implementation libraries. Field-programmable gate arrays (FPGAs) are an attractive design and implementation platform to meet performance and energy goals; however, there are two main challenges to their adoption (1) small FPGAs are cost-effective but insufficient to replace the efficient, low-cost ASICs for computation-demanding applications; large FPGAs can fulfill all computation demands, but are too expensive to meet IoT price points, and (2) design and development for FPGAs is challenging and require hardware design expertise. This project?s innovation targets these challenges. First, our proposed platform will combine a media ASIC for efficient video processing with a small cost-effective FPGA for custom machine learning. Second, our proposed domain specific high level synthesis will generate efficient machine learning accelerators for standard machine learning infrastructures quickly, limiting required hardware design expertise while out-performing general purpose design techniques. This project will leverage background expertise in hardware design, design tools, and machine learning to develop and demonstrate the advantages of hybrid computation platforms for smart vision applications in terms of performance, energy consumption, cost and physical size.