CDS&E: SuperSTARLU - STacked, AcceleRated Algorithms for Sparse Linear Systems

由于快速处理器和较慢的内存层次结构之间的不平衡，计算系统和相关软件长期以来不得不在性能方面做出权衡。最新发布的3D堆叠存储器技术提供了一个机会，通过提供更高的存储器带宽和访问存储器的新方法来减少这种不平衡。使用3D堆叠内存最有前途的技术之一是“以内存为中心”的计算，它将计算尽可能靠近主存。然而，对于如何在库和应用程序中最好地使用这些新内存技术，人们知之甚少，即使这些硬件被计划集成到近期的百亿亿次超级计算系统中。该项目的目标是了解充分利用3D堆叠存储器所需的技术和方法，并展示一组有用的计算原语，这些原语可以作为使用这些新存储器组件加速大型科学代码的模板。本研究考虑了使用“以内存为中心”的处理器有效地实现稀疏原语作为库的一部分的具体问题，该库支持许多关键的科学应用，包括辐射传输，流体流动和聚变模拟。这个库，SuperLU_DIST，是一个稀疏的直接求解器库，专为分布式内存多核系统设计，以前在NVIDIA？英特尔的图形协处理器和英特尔？Xeon Phi协处理器。虽然这项先前的工作迄今为止已经产生了有希望的速度，但它也揭示了与内存数据传输相关的关键和基本算法性能瓶颈。这个研究项目将调查这些瓶颈是否可以通过使用新兴的以内存为中心的协处理器来缓解。这类协处理器包括Micron？混合内存立方体（HMC）和高带宽内存（HBM），结合了3-D堆叠存储器和fpga，提供更低的延迟，更高的带宽数据传输，并支持近内存数据处理。该项目将使用像OpenCL这样的高级语言来利用这些技术，并将利用先进的算法和软件库开发来提高应用程序的性能。此外，这项工作将导致SuperLU的一个新的开源版本，称为Super Stacked， Accelerated LU (SuperSTARLU)，它将提供给应用程序开发人员，并将在具有以内存为中心的协处理器的下一代系统上进行演示，例如NERSC？科里。

Computing systems and associated software have long had to make trade-offs in terms of performance due to an imbalance between fast processors and their slower memory hierarchies. Newly released technologies for 3D stacked memories provide an opportunity to reduce this imbalance by providing higher memory bandwidths and novel ways for accessing memory. One of the most promising techniques for using 3D stacked memory involves "memory-centric" computation that moves computation as close as possible to main memory. However, there is little understanding of how to best use these new memory technologies in libraries and applications, even as this hardware is slated to be integrated into near-term exascale supercomputing systems. The goal of this project is to understand the techniques and approaches that are needed to fully utilize 3D stacked memories and to demonstrate a useful set of computational primitives that can serve as a template for accelerating large scientific codes with these new memory components.This research considers the specific problem of using "memory-centric" processors effectively to implement sparse primitives as part of a library that supports a number of key scientific applications including radiation transport, fluid flow, and fusion simulations. This library, SuperLU_DIST, is a sparse direct solver library designed for distributed memory multicore systems that has previously been accelerated on both NVIDIA?s graphics co-processors and Intel?s Xeon Phi co-processor. While this prior work has thus far yielded promising speedups, it has also revealed critical and fundamental algorithmic performance bottlenecks related to memory data transfers. This research project will investigate whether these bottlenecks may be mitigated by using emerging memory-centric co-processors. Such co-processors, which include Micron?s Hybrid Memory Cube (HMC) and High-Bandwidth Memory (HBM), combine 3-D stacked memories and FPGAs to provide lower latency, higher bandwidth data transfer, and support for near-memory data processing. The project will use high-level languages like OpenCL to take advantage of such technologies and will utilize a mix of algorithmic advances and software library development to improve application performance. Additionally, this work will lead to a new, open-source release of SuperLU called Super Stacked, Accelerated LU (SuperSTARLU), which will be made available to application developers and will be demonstrated on one of the next-generation systems with memory-centric co-processors, such as NERSC?s Cori.