SHF:SMALL: MECAR: Memory-Centric Architecture to Bridge the Gap Between Computing and Memory

SHF:SMALL：MECAR：以内存为中心的架构，弥合计算和内存之间的差距

• 批准号: 1719160
• 负责人: Yufei Ding
• 金额: $ 45万
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-07-15 至 2021-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1719160&HistoricalAwards=false
• 关键词: SHF; SMALL; MECAR; Memory; Centric

Traditional computer systems usually follow the so-called classic Von Neumann architecture, with separated processing units (such as CPUs and GPUs) to do computing and memory units for data storage.  The increasing gap between the computing of processor and the memory has created the memory wall problem in which the memory subsystem is becoming the bottleneck of the entire computing system. As technology scales, data movement between the processing units (PUs) and the memory is becoming one of the most critical performance and energy bottlenecks in various computer systems, ranging from cloud servers to end-user devices. As we enter the era of big data, many emerging data-intensive workloads become pervasive and mandate very high bandwidth and heavy data movement between the computing units and the memory.  The fundamental goal of this project is to advance the trend of bridging the gap between computing and memory, with an application-driven approach. By leveraging the PI's prior extensive research on 3D-stacked memory and non-volatile memory architecture, the PI proposes to focus on (1) designing memory-centric processing unit (PU) architecture with massive GB on-chip/on-package memory integrated with computing units; (2) investigating new processing-in-memory(PIM) memory architecture designs with both DRAM and emerging NVM; (3) and co-design and co-optimization of both memory-centric PU architecture and NDC/PIM memory architecture, with the emerging data-intensive applications such as neural computing and graph analytics as application driver to guide the architecture optimization. The success of this research will have enormous economic and social benefits as broader impact. The research will provide the design guidelines for enabling future computing systems beyond the state-of-the-art, ranging from high performance exascale computing to low power mobile systems. Consequently, it will enhance nearly every digital device available today from consumer to enterprise electronics. It can also spawn new applications involving the computation on the exascale of data, e.g. data mining, machine learning, bio-informatics, etc. It is expected that this project will serve as a catalyst to accelerate the adoption of data-intensive and memory-centric technologies in future computer systems and applications from architecture and system design perspectives. The PI has extensive industrial ties with summer internships planned, which will be invaluable for broadening the knowledge and skills of the students. The PI will also strive to educate a broad audience on the emerging technologies through regular and online classes. Publication/lecture notes will be released on public websites to promote the broader dissemination of scientific knowledge.

传统的计算机系统通常遵循所谓的经典冯·诺伊曼（Von Neumann）体系结构，并带有单独的处理单元（例如CPU和GPU）来进行计算和存储单元以进行数据存储。处理器的计算与内存之间的差距不断增加，从而创造了内存子系统成为整个计算系统的瓶颈的内存壁问题。随着技术的扩展，处理单元（PU）和内存之间的数据移动正在成为各种计算机系统中最关键的性能和能量瓶颈之一，从云服务器到最终用户设备。当我们进入大数据时代时，许多新兴的数据密集型工作负载变得普遍，并且在计算单元和内存之间的较高的带宽和重型数据运动。该项目的基本目标是通过以应用程序驱动的方法来促进计算和内存之间差距的趋势。通过利用PI对3D堆叠内存和非易失性内存体系结构的广泛研究，PI提案专注于（1）设计以内存为中心的加工单元（PU）架构，并具有大量的GB芯片/芯片/包上的内存存储器，该架构与计算单位集成了； （2）研究使用DRAM和新兴NVM的新型过程（PIM）内存架构设计； （3）以及以内存为中心的PU体系结构和NDC/PIM内存体系结构的共同设计和共选，以及新兴的数据密集型应用程序（例如神经计算和图形分析）作为应用程序驱动程序，以指导体系结构优化。这项研究的成功将带来巨大的经济和社会利益，这是更广泛的影响。这项研究将提供设计指南，以实现最先进的未来计算系统，从高性能Exascale计算到低功率移动系统。因此，它将增强从消费者到企业电子产品的今天几乎所有可用的数字设备。它还可以产生涉及数据外部计算的新应用程序，例如数据挖掘，机器学习，生物信息学等。预计该项目将作为催化剂加速从建筑和系统设计的角度来加速未来计算机系统和应用程序中数据密集型和以内存为中心的技术。 PI与计划的暑期实习有着广泛的工业关系，这对于扩大学生的知识和技能是无价的。 PI还将努力通过常规和在线课程对新兴技术进行教育。出版/讲义将在公共网站上发布，以促进更广泛的科学知识传播。

项目成果

A Survey of Accelerator Architectures for Deep Neural Networks

• DOI: 10.1016/j.eng.2020.01.007
• 发表时间: 2020-03-01
• 期刊: ENGINEERING
• 影响因子: 12.8
• 作者: Chen, Yiran;Xie, Yuan;Tang, Tianqi
• 通讯作者: Tang, Tianqi

iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture

• DOI: 10.1109/isca45697.2020.00071
• 发表时间: 2020-05
• 期刊: 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
• 作者: P. Gu;Xinfeng Xie;Yufei Ding;Guoyang Chen;Weifeng Zhang;Dimin Niu;Yuan Xie

Timely: Pushing Data Movements And Interfaces In Pim Accelerators Towards Local And In Time Domain

• DOI: 10.1109/isca45697.2020.00073
• 发表时间: 2020-05
• 期刊: 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
• 作者: Weitao Li;Pengfei Xu;Yang Zhao;Haitong Li;Yuan Xie;Yingyan Lin

DUET: Boosting Deep Neural Network Efficiency on Dual-Module Architecture

• DOI: 10.1109/micro50266.2020.00066
• 发表时间: 2020-10
• 期刊: 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
• 作者: Liu Liu-Liu;Zheng Qu;Lei Deng;Fengbin Tu;Shuangchen Li;Xing Hu;Zhenyu Gu;Yufei Ding;Yuan Xie

Boosting Deep Neural Network Efficiency with Dual-Module Inference

• 发表时间: 2020-07
• 作者: Liu Liu-Liu;Lei Deng;Zhaodong Chen;Yuke Wang;Shuangchen Li;Jingwei Zhang;Yihua Yang;Zhenyu Gu;Yufei Ding;Yuan Xie