CSR: Medium: Collaborative Research: Interweaving the Parallel Software/Hardware Stack

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This project seeks to advance the state of the art of parallel systems. Usually, the layers of a parallel system - the compiler, run-time system, operating system, and hardware - are considered as separate entities with a rigid division of labor. This project investigates an alternative model, "interweaving," in which these layers are integrated as needed to improve the performance, scalability, and efficiency of the specific parallel system. The research involves five thrusts: (1) Blending studies using compiler technology to achieve integration of code that would normally be found in distinct, separately compiled layers. (2) Coherence considers hardware without memory coherence and its implications throughout the "interwoven" parallel system. (3) Predictability studies the integration of hard real-time behavior into a parallel system through hardware and compiler support. (4) Mapping considers address translation for parallel systems given hardware and compiler support. (5) Debugging studies how to debug an interwoven system. These investigations go hand-in-hand with the continual development of a prototype and its evaluation.Parallel systems are of critical importance for science and engineering, and have become ubiquitous; even simple devices like smartphones incorporate growing parallelism. The project thus has the potential to improve a wide range of applications both through its ideas and is open code. It will also train Ph.D. and undergraduate students, and enhance collaborations between two Chicago-area universities. Code, data, and results will be maintained publicly (http://interweaving.org) for the project's duration, and requests considered for five years afterwards.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.