Collaborative Research: PPoSS: LARGE: Unifying Software and Hardware to Achieve Performant and Scalable Frictionless Parallelism in the Heterogeneous Future

合作研究：PPoSS：大型：统一软件和硬件，在异构未来实现高性能和可扩展的无摩擦并行

• 批准号: 2119069
• 负责人: Peter Dinda
• 金额: $ 192.75万
• 依托单位: Northwestern University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-10-01 至 2025-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2119069&HistoricalAwards=false
• 关键词: Collaborative; Research; PPoSS; LARGE; Unifying

Exploiting parallelism is essential to making full use of computer systems, from phones to supercomputers. It is thus intrinsic to most applications today, and is becoming increasingly so with time, especially as hardware becomes more heterogeneous. Programming effective and performant parallel applications remains a serious challenge, however. Achieving both high productivity and high performance currently requires multiple experts. The project seeks to reduce this to an ordinary programmer. This problem is often approached along only one of two lines, "theory down", focusing on high-level parallel languages and the theory and practice of parallel algorithms, or "architecture up", focusing on rethinking abstractions at multiple layers, starting with the hardware. The project’s core novelties are (1) to unify these two approaches, combining their strengths to reduce the expertise needed to write performant parallel programs, and (2) to develop integrated techniques that can enable taking advantage of heterogeneous hardware. Realizing these novelties will require designing a "full-stack" approach to parallelism and innovation across the hardware/software stack. The project's impacts are (1) the development of techniques that dramatically simplify parallel programming, including for heterogeneous machines, putting it into the purview of the ordinary programmer, and (2) the development of systems and educational materials to teach this skill to broader audiences including students at the researchers' institutions.The technical strategy of the project is to bridge high-level parallel languages, which allow clean expression and analysis of program parallelism, to heterogeneous, extensible hardware (modeled using FPGAs) through an integrated series of intermediate representations (IRs) of a program and of the hardware/software capabilities of the target platform. The design of these representations will be geared to avoid the information loss (going both up and down the compiler/runtime/OS/hardware stack) that currently hampers optimization at all levels. A new compilation model for high-level parallel languages is being developed that extensively leverages modern compiler technology, but also avoids "premature lowering" of parallel constructs, and "premature abstraction" of hardware and low-level software features. Benchmarks are beinge developed to measure the effectiveness of the approach.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

利用并行性对于从手机到超级计算机的充分利用计算机系统至关重要。因此，它对于当今的大多数应用程序都是固有的，并且随着时间的流逝而变得越来越多，尤其是随着硬件变得更加异质。但是，编程有效且性能的并行应用仍然是一个严重的挑战。目前，达到高生产率和高性能都需要多个专家。该项目旨在将其减少给普通程序员。这个问题通常只沿着两行之一来解决，“理论下降”，重点是高级平行语言以及并行算法的理论和实践，或“架构上升”，重点是重新思考多层上的抽象，从硬件开始。该项目的核心新颖性是（1）统一这两种方法，结合其优势以减少编写表演平行程序所需的专业知识，以及（2）开发可以利用异构硬件的集成技术。意识到这些新颖性将需要在硬件/软件堆栈中设计一种“全栈”方法来并行性和创新。该项目的影响是（1）大幅简化平行编程的技术的开发，包括用于异质机器，将其置于普通程序员的范围内，以及（2）系统和教育材料的发展以向更广泛的听众传授该技能，包括在研究人员的机构中进行更广泛的学生。通过程序和目标平台的硬件/软件功能的一系列集成中间表示（IRS）集成的集成中间表示（IRS），异质，可扩展的硬件（使用FPGA建模）。这些表示形式的设计将适合避免信息丢失（在编译器/Runtime/OS/Hardware stack上进行上下丢失），该信息当前在各个级别上都在所有级别上进行优化。正在开发针对高级平行语言的新汇编模型，该模型广泛利用了现代编译器技术，但也避免了并行构造的“过早降低”，以及硬件和低级软件功能的“过早抽象”。正在开发基准来衡量方法的有效性。该奖项反映了NSF的法定任务，并通过使用基金会的知识分子优点和更广泛的影响标准来评估，被视为珍贵的支持。

项目成果

WARDen: Specializing Cache Coherence for High-Level Parallel Languages

WARDen：专门针对高级并行语言的缓存一致性

• DOI: 10.1145/3579990.3580013
• 发表时间: 2023
• 期刊: Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization
• 作者: Wilkins, Michael;Westrick, Sam;Kandiah, Vijay;Bernat, Alex;Suchy, Brian;Deiana, Enrico Armenio;Campanoni, Simone;Acar, Umut A.;Dinda, Peter;Hardavellas, Nikos
• 通讯作者: Hardavellas, Nikos

Evaluating Functional Memory-Managed Parallel Languages for HPC using the NAS Parallel Benchmarks

使用 NAS 并行基准评估 HPC 的功能内存管理并行语言

• DOI: 10.1109/ipdpsw59300.2023.00072
• 发表时间: 2023
• 期刊: Proceedings of the 28th HIPS workshop at IPDPS 2023
• 作者: Wilkins, Michael;Weil, Garrett;Arnold, Luke;Hardavellas, Nikos;Dinda, Peter
• 通讯作者: Dinda, Peter

NOELLE Offers Empowering LLVM Extensions

NOELLE 提供强大的 LLVM 扩展

• DOI: 10.1109/cgo53902.2022.9741276
• 发表时间: 2022
• 期刊: 2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO
• 作者: Matni, Angelo;Deiana, Enrico Armenio;Su, Yian;Gross, Lukas;Ghosh, Souradip;Apostolakis, Sotiris;Xu, Ziyang;Tan, Zujun;Chaturvedi, Ishita;Homerding, Brian
• 通讯作者: Homerding, Brian

Program State Element Characterization

程序状态元素表征

• DOI: 10.1145/3579990.3580011
• 发表时间: 2023
• 期刊: International Symposium on Code Generation and Optimization
• 作者: Deiana, Enrico Armenio;Suchy, Brian;Wilkins, Michael;Homerding, Brian;McMichen, Tommy;Dunajewski, Katarzyna;Dinda, Peter;Hardavellas, Nikos;Campanoni, Simone
• 通讯作者: Campanoni, Simone

Quantifying the Semantic Gap Between Serial and Parallel Programming

量化串行和并行编程之间的语义差距

• DOI: 10.1109/iiswc53511.2021.00024
• 发表时间: 2021
• 期刊: 2021 IEEE International Symposium on Workload Characterization (IISWC
• 作者: Zhang, Xiaochun;Jones, Timothy M.;Campanoni, Simone
• 通讯作者: Campanoni, Simone