Collaborative Research: PPoSS: LARGE: Unifying Software and Hardware to Achieve Performant and Scalable Frictionless Parallelism in the Heterogeneous Future

合作研究：PPoSS：大型：统一软件和硬件，在异构未来实现高性能和可扩展的无摩擦并行

• 批准号: 2119069
• 负责人: Peter Dinda
• 金额: $ 192.75万
• 依托单位: Northwestern University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-10-01 至 2025-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2119069&HistoricalAwards=false
• 关键词: Collaborative; Research; PPoSS; LARGE; Unifying

Exploiting parallelism is essential to making full use of computer systems, from phones to supercomputers. It is thus intrinsic to most applications today, and is becoming increasingly so with time, especially as hardware becomes more heterogeneous. Programming effective and performant parallel applications remains a serious challenge, however. Achieving both high productivity and high performance currently requires multiple experts. The project seeks to reduce this to an ordinary programmer. This problem is often approached along only one of two lines, "theory down", focusing on high-level parallel languages and the theory and practice of parallel algorithms, or "architecture up", focusing on rethinking abstractions at multiple layers, starting with the hardware. The project’s core novelties are (1) to unify these two approaches, combining their strengths to reduce the expertise needed to write performant parallel programs, and (2) to develop integrated techniques that can enable taking advantage of heterogeneous hardware. Realizing these novelties will require designing a "full-stack" approach to parallelism and innovation across the hardware/software stack. The project's impacts are (1) the development of techniques that dramatically simplify parallel programming, including for heterogeneous machines, putting it into the purview of the ordinary programmer, and (2) the development of systems and educational materials to teach this skill to broader audiences including students at the researchers' institutions.The technical strategy of the project is to bridge high-level parallel languages, which allow clean expression and analysis of program parallelism, to heterogeneous, extensible hardware (modeled using FPGAs) through an integrated series of intermediate representations (IRs) of a program and of the hardware/software capabilities of the target platform. The design of these representations will be geared to avoid the information loss (going both up and down the compiler/runtime/OS/hardware stack) that currently hampers optimization at all levels. A new compilation model for high-level parallel languages is being developed that extensively leverages modern compiler technology, but also avoids "premature lowering" of parallel constructs, and "premature abstraction" of hardware and low-level software features. Benchmarks are beinge developed to measure the effectiveness of the approach.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

开发并行性对于充分利用从电话到超级计算机的计算机系统至关重要。 因此，它是当今大多数应用程序所固有的，并且随着时间的推移变得越来越多，特别是随着硬件变得更加异构。 然而，编写有效和高性能的并行应用程序仍然是一个严峻的挑战。 要同时实现高生产力和高性能，目前需要多名专家。 该项目旨在将其减少到普通程序员。这个问题通常是沿着只有两条线，“理论向下”，专注于高级并行语言和并行算法的理论和实践，或“架构向上”，专注于重新思考抽象的多个层次，从硬件开始。 该项目的核心创新是（1）统一这两种方法，结合它们的优势，以减少编写高性能并行程序所需的专业知识，以及（2）开发集成技术，可以利用异构硬件。 实现这些创新将需要设计一个“全栈”的方法来并行和创新的硬件/软件堆栈。 该项目的影响是（1）开发技术，极大地简化并行编程，包括异构机器，将其纳入普通程序员的视野，（2）开发系统和教育材料，向更广泛的受众，包括研究机构的学生教授这种技能。该项目的技术战略是连接高级并行语言，其允许程序并行性的清晰表达和分析，通过程序和目标平台的硬件/软件能力的一系列集成的中间表示（IR），到异构的可扩展硬件（使用FPGA建模）。 这些表示的设计将被调整以避免信息丢失（在编译器/运行时/操作系统/硬件堆栈中向上和向下），这目前阻碍了所有级别的优化。 正在开发一种新的高级并行语言编译模型，它广泛利用现代编译器技术，但也避免了并行结构的“过早降低”，以及硬件和低级软件功能的“过早抽象”。 该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

WARDen: Specializing Cache Coherence for High-Level Parallel Languages

WARDen：专门针对高级并行语言的缓存一致性

• DOI: 10.1145/3579990.3580013
• 发表时间: 2023
• 期刊: Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization
• 作者: Wilkins, Michael;Westrick, Sam;Kandiah, Vijay;Bernat, Alex;Suchy, Brian;Deiana, Enrico Armenio;Campanoni, Simone;Acar, Umut A.;Dinda, Peter;Hardavellas, Nikos
• 通讯作者: Hardavellas, Nikos

NOELLE Offers Empowering LLVM Extensions

NOELLE 提供强大的 LLVM 扩展

• DOI: 10.1109/cgo53902.2022.9741276
• 发表时间: 2022
• 期刊: 2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO
• 作者: Matni, Angelo;Deiana, Enrico Armenio;Su, Yian;Gross, Lukas;Ghosh, Souradip;Apostolakis, Sotiris;Xu, Ziyang;Tan, Zujun;Chaturvedi, Ishita;Homerding, Brian
• 通讯作者: Homerding, Brian

Evaluating Functional Memory-Managed Parallel Languages for HPC using the NAS Parallel Benchmarks

使用 NAS 并行基准评估 HPC 的功能内存管理并行语言

• DOI: 10.1109/ipdpsw59300.2023.00072
• 发表时间: 2023
• 期刊: Proceedings of the 28th HIPS workshop at IPDPS 2023
• 作者: Wilkins, Michael;Weil, Garrett;Arnold, Luke;Hardavellas, Nikos;Dinda, Peter
• 通讯作者: Dinda, Peter

Program State Element Characterization

程序状态元素表征

• DOI: 10.1145/3579990.3580011
• 发表时间: 2023
• 期刊: International Symposium on Code Generation and Optimization
• 作者: Deiana, Enrico Armenio;Suchy, Brian;Wilkins, Michael;Homerding, Brian;McMichen, Tommy;Dunajewski, Katarzyna;Dinda, Peter;Hardavellas, Nikos;Campanoni, Simone
• 通讯作者: Campanoni, Simone

Quantifying the Semantic Gap Between Serial and Parallel Programming

量化串行和并行编程之间的语义差距

• DOI: 10.1109/iiswc53511.2021.00024
• 发表时间: 2021
• 期刊: 2021 IEEE International Symposium on Workload Characterization (IISWC
• 作者: Zhang, Xiaochun;Jones, Timothy M.;Campanoni, Simone
• 通讯作者: Campanoni, Simone