STTR Phase I: Enhancing IoT's Connected Device Capabilities using High-Performance Low-Power RRAM-based FPGAs

这一小型技术转移研究(STTR)第一阶段项目的更广泛影响/商业潜力在于它能够在物联网(IoT)中实现可重新配置的硬件加速。边缘电力受限的用户将能够选择能够带来加速的新解决方案，并支持类似数据中心的功能，并受益于物联网长期寻求的承诺。使用阻性随机存取存储器(RRAM)开发下一代现场可编程门阵列(FPGA)，在提高性能的同时降低传感器节点级别的能耗，是可能的。正如我们在数据驱动的世界中已经经历的那样，我们必须提高边缘的计算能力，以便获得响应能力并提高能源效率。随着消费者需求对数据和性能的要求越来越高，新兴存储器的创新使用显示出巨大的前景，并提供了有助于实现物联网潜力的功能。如果实现，这项技术将有可能使一整套边缘数据驱动的应用程序，如低能量图像识别和无人机学习，运行更长时间和更有效，或具有领先的数据聚合和反应能力的长期医疗植入物。这项小型技术转移研究(STTR)第一阶段项目将致力于将一项专利技术商业化，以实现基于电阻随机存取存储器(RRAM)的超低功耗现场可编程门阵列(FPGA)。为了应对物联网(IoT)网络中的数据爆炸，该行业正朝着提高单个IoT设备的智能分析能力的方向发展。功耗预算紧张已经成为一个关键的障碍：高端解决方案，如多核CPU、GPU，可以提供足够的计算能力，但无法满足功耗预算；而低功耗商业产品，如微控制器和低功耗FPGA，可以满足功耗限制，但很难跟上日益增长的数据分析算法的复杂性。本项目旨在开发一款超低功耗的现场可编程门阵列，能够在物联网级别的功率限制下提供高性能的数据分析能力。该项目将围绕一种创新的基于RRAM的路由多路复用器设计来构建一个FPGA芯片的原型。我们还将发布一个相关的软件工具套件，以支持客户在该技术上的应用程序的实施。与现有的商业解决方案相比，拟议的现场可编程门阵列产品预计将展示出与高端现场可编程门阵列解决方案类似的计算能力，同时满足物联网功率预算(1W)。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The broader impact/commercial potential of this Small Technology Transfer Research (STTR) Phase I project lays in its ability to enable reconfigurable hardware acceleration in the Internet-of-Things (IoT). Users under constrained power at the edge will be able to choose a new solution that can bring acceleration, and enable datacenter like capabilities, and benefit from the IoT's long-sought promise. Using Resistive Random-Access Memory (RRAM) to develop a next-generation Field Programmable Gate Array (FPGA), increasing performance while reducing energy consumption at the sensor node level, is possible. As already experienced in our data driven world, it is critical that we improve our computing capabilities at the edge in order to gain in responsiveness and increase our energy efficiency. With evermore data and performance requirements to deliver on the consumer demands, innovative uses of emerging memories are showing great promise and providing capabilities that will help fulfill the IoT's potential. If fulfilled, this technology has the potential to enable a whole set of data driven applications at the edge, such as low-energy image recognition and learning in drones to operate longer and more effectively or long-lasting medical implants with leading data aggregation and reactiveness.This Small Technology Transfer Research (STTR) Phase I project will aim to commercialize a patented technology to realize a ultra-low-power Field Programmable Gate Array (FPGA) based on Resistive Random-Access Memory (RRAM). To handle the data explosion in Internet of Things (IoT) network, the industry is moving towards increasing intelligent analysis capability for single IoT devices. Tight power budget has become a critical road block: high-end solutions, such as multicore CPUs, GPUs, can provide enough computing capability but fail to meet the power budget, while low-power commercial products, such as micro-controllers and low-power FPGAs, can satisfy power constraints but hardly follow the increasing complexity in data analysis algorithms. This project aims to develop a ultra-low-power FPGA that can offer high-performance data analysis capability under IoT-level power limits. This project will prototype a FPGA chip built around an innovative RRAM-based routing multiplexer design. We will also release an associated software tool suite to support the implementation of customer's applications on the technology. Compared to existing commercial solutions, the proposed FPGA product is expected to demonstrate similar computing capability as high-end FPGA solutions while satisfying an IoT power budget (1W).This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.